Project System

PRASHANTH.R

Manjunatha layout,

marathalli,

E-mail: *********.*********@*****.***

PIN:560037

Bangalore, India. Phone: +91-973*******.

Objective:

Intend to build a career with leading corporate of hi-tech environment with committed and

dedicated people, which will help me to explore myself fully and realize my potential. Willing to

work as a key player in challenging & creative environment.

Personal Skills:

Willingness to learn, ability to cope and work with people in groups, leadership quality, believes

in teamwork, friendly behaviors.

Technical Skill set:

Operating System Windows XP, Win 7, Linux.

Languages Assembly, C, C++, Verilog HDL, VHDL.

Tool Packages Cadence, Xilinx ISE, Modelsim SE.

Educational Details:

Pursing M.Tech, (VLSI AND EMBEDDED SYSTEM DESIGN) with 74% aggregate

in NEW HORIZON COLLEGE OF ENGINEERING, MARATHALLI

BANGALORE-560103.

B.E (ECE Batch 2009-13) with an aggregate of 66% (Marks obtained without backlogs)

from SCT INSTITUTE OF TECHNOLOGY, BANGALORE.

PRE UNIVERSITY COLLEGE Passed in First class, 64% from VAGDEVI

VILAS PRE UNIVERSITY COLLEGE in year 2009.

SSLC Passed in First class, 60% from TRINITY ENGLISH HIGHER

SECONDARY SCHOOL in the year 2007.

Academic Projects:

1) Project Title: “Building an AMBA-AHB Compliant Memory Controller”

(final year project)

: Feb – June 2013.

Duration of the project

Team size : 4

Software using : Xilinx ISE 10.1, Modelsim SE 6.2c.

Languages using : Verilog HDL.

Brief Overview of the Projects:

With the improvement of Microprocessor these years, the memory access time has been

a bottleneck which limits the system performance. The memory controller is the part of the

system that, well, controls the memory. In our project, an Advanced Microcontroller Bus

Architecture (AMBA) compliant memory controller is designed for system memory control with

the main memory consisting of SRAM and ROM. The memory controller is compatible with

Advanced High-performance Bus (AHB) which is a new generation of AMBA bus, our solution

reduced the delay, size of on-chip memory space and other parameters required for operation.

Under the guidance of Mrs. Lalitha Brunda, HOD Dept. of ECE.

2) Project Title: “Designing Charge pump and PFD in 180nm Technology”.

The PFD (Phase and Frequency Detector) and charge pump are the essential part

of PLL device. Which is used to detect the phase or frequency change in an output of

VCO with respect to reference signal. And gives an appropriate output signal to Vcntrl

(Control signal of VCO) to control the Oscillations.

PLL’s are widely used in computer, radio, and telecommunications systems where it is

necessary to stabilize a generated signal or to detect signals.

Additional Responsibilities:

Co-ordinator for Department online discussion forum(300+ member).

Event Organizer in Technical Symposium

Favorite pursuit:

Painting, Gathering Information on latest booming technology and Listening to soft music.

Personal Profile:

Name : Prashanth. R

Date of Birth : October 15, 1991

Father’s name and : Mr. G. Renugopal.

Sex : Male

Marital Status : Single

Linguistic ability : Telugu, English, Tamil, kannada and Hindi.

Nationality : Indian

Declaration:

I hereby declare that the information furnished above is true to the best of my knowledge.

Place: Bangalore. (PRASHANTH.R)

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