Engineering Project

CURRICULUM VITAE

I GEETHA,

W/O B.SIVAJI REDDY,

Rachuru,

Unguturu Mandal, Phone No: 088********, 965-***-****.

West Godavari Dist-534406 E-mail: ******.****@*****.***

Objective:

To be a part of an Organization, which can offer a challenging career growth to myself and to

the organization interms of Technology and Knowledge sharing.

Working Experience:

Worked as Assistant professor in Aditya Engineering college from 2009-2010.

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AREAS OF INTEREST:

Electronic devices and circuits

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Network analysis

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Switching Theory and Logic Design

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VLSI Design

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LABS:

Electronic Devices and Circuits lab.

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Pulse and Digital Circuits lab.

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Academic Profile:

Qualification Specialization University Period Percentage

Shri Vishnu

M.Tech VLSI System Design 2011-13 74

Engineering College

for women, JNTU

(Kakinada)

Electronics & Sri Vasavi

communicati Engineering

ons College

B. Tech 2004 – 2009 62.7

engineering pedatadepalli, JNTU

(Kakinada).

Maths, Physics, Board of

Chemistry Intermediate

Intermediate 2002 – 2004 92.1

Education,

A.P.

Jawahar Navodaya

Vidyalaya

Maths, General Pedavagi,

S.S.C sciences, (Central 2001 – 2002 78.9

Languages Board of

Secondary

Education).

Project Title: VLSI Architecture of implementation of dual-precision Floating point multiplier

Project description:

FPGA’s have a generic nature of programmability and suppleness to implement during a wide

selection of applications. However FPGA’s encompasses a non-specific nature towards the

scientific applications whatever floating-point operations are needed. Floating purpose arithmetic

operations consume great deal of space and its resources. Typically floating purpose operations

involve addition, subtraction, multiplication, division and square root. During this paper, we tend

to target quick multiplication that’s capable to perform either single precision operation or a

double precision operation. These operations are designed to reduce the delay and space by

reducing the amount of partial product generations. In this project we tend to planned a way of

Vedic multiplier method. This method shows the high performance of multiplier in embedded

cores.

Extracurricular Activities:

Participated in Quiz contest organized at college and school level.

Participated in Cultural Event at school and college.

Participated in Vasavi Techfest-07 in college.

Participated in “VLSI Design using Mentor Graphics Tools” Workshop.

Participated in “Real Time Audio and video Processing on Texas Instruments

development Tools” Workshop.

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Personal Profile:

Father Name : Sri I Venkata Satyanarayana

Date of Birth : 10th June, 1987

Nationality : Indian

Religion : Hindu

Martial Status : Married

Languages Known : Telugu, English, Hindi

Declaration:

The information provided above is true to the best of my knowledge. I will try my best to do the work

assigned to me without any postponement. Hope you will give me a chance to prove myself.

Date:

Place: GEETHA.I

Contact this candidate