vlsi physical layout

Name : Bhavana R. Guda

Phone : +917*********

Email : *******.******@*****.***

Carrier Objective

. Fresher looking for a job to improve my practical knowledge in an

industrial environment.

Technical Spectrum

> E-CAD Tools : LTspice,, Xilinx

> Programming Languages : C(Basic level), VHDL, Verilog

> IDE Tools : MPLAB,

> Operating Systems : Windows XP, Windows 7

> Other Tools : Labview, MATLAB

Cadence(All the basic level gate designing in

cadence..)

Education Qualification

Degree Institute Year Mark

M.Sc Department of Electronic 2012-14 4.88/6 GPA

Science, Pune University

B.Sc Fergusson College, Pune 2009-12 75%

H.S.C Fergusson College, Pune 2009 75%

S.S.C R&DE (Engrs) English School 2007 83.53%

Projects

1.Greenhouse monitoring system using ATMega8 (sem3 MSc)

2.Designing of PCB, Buck Regulator (sem1 M.Sc)

3. DAC using R-2R ladder (sem2 M.Sc)

4. Greenhouse monitoring system using 89C51 (B.Sc last year)

Currently I am interning at R&DE (DRDO) Dighi

1.Working on "Input Devic For Gesture Control".

Extra Curricular Activities & Achievements

> I have participated in MATHEX MATHEMATICS COMPITITION.

> Organized study visit to R&DE (DRDO) Dighi

> Organized the fest ELEKTRA

> Organized the blood donation camp for the same fest

> Appeared and passed the Math's Olympiad at school level

> Won several essay writing competition at school level

Personal Profile

Name : Bhavana R.Guda

Father's Name : Rajendra V.Guda

Date of Birth : 02/06/1991

Sex : Female

Marital status : Single

Address : Qtr No.223, Type II, R&DE Colony,

Vishrantwadi,

Alandi Road, Pune-411015

Languages Known : English, Marathi, Hindi, Tamil

Nationality : Indian

Personal Strengths

. Ability to work in a group

. Good grasping power

. Patience

Contact this candidate