Project Design

.

RESUME

Sriram B

S/o Raj mohan rao

Email ID: **********@*****.***

H.No 1-121, Asnad (vill)

Mobile: +91-988*******

Chennur(mandal), Adilabad

Pin-no 504201

Andhrapradesh

Objective

I would like to expand my envelope and become an asset to the project iam

assigned.

Educational qualification

Class/Course Name of Institute Board/University Year of Marks%

Passing

Master of Science Manipal Centre Manipal Academy of 2012-

in Technology for Information Higher Education till

(M.Sc.Tech) Science (MAHE), Manipal date GPA

( VLSI Design) 8/10

B.Tech SVIT, Hyderabad JNTU Hyderabad 2011 55.27

(Electronics and

Communication

Engineering)

Intermediate Narayana Junior Board of intermediate 2007 93.2

College, Education

Hyderabad

SSC St. John's High Board of secondary 2005 79.6

School education,

Projects

Title: Implementation of 32 bit MIPS Processor .

Description:

The project is to simulate the operation of MIPS Processor.

The datapath with all the modules for different implementations of the

MIPS instruction set is constructed,and an implementation that includes

a subset of the core MIPS instruction is simulated.

This task accomplished in vcs tool using Verilog HDL coding.

Title: Implementation of low power differential amplifier using floating

gate technique.

Description:

The project is to design a low power differential amplifier

by controlling the gate of the MOSFET using floating gate technique and

compare the simulation results with the normal differential amplifier. This

project is executed with the help of cadence virtuoso tool.

Title: Low Complexity High Speed Decoder Design for QCLDPC.

(Quasi Cyclic Low Density Parity Checker)

Description:

In our project LDPC codes guarantees that the ECC

codeword has an appropriate redundancy structures such that it can detect

multiple errors occurring in both the stored word in the memory and the

surrounding circuitries. These codes were developed in Xilinx environment

using Verilog.

Areas of field interest

Digital Design, CAD for VLSI, Analog Circuits, Processor Architecture.

Technical Skills

Programing Languages : C

Hardware Description Languages : VERILOG

Tools : Synopsys VCS,

Xilinx ISE design suite, Cadence

Virtuoso, B

Spice .

Scripting Languages : shell

personal profile

Date of Birth : 10/01/1990

Gender : male

Marital Status : unmarried

Passport No : J7844965

Declaration

I hereby declare that the information furnished above is true to the best

of my knowledge.

Place :

Date: SRIRAM B

1

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