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Design Designer

Location:
Garland, TX
Posted:
December 24, 2013

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Resume:

Gregory Hartz 972-***-**** (cell)

**** ******* **.

Garland, Tx. 75042 **********@*****.***

SUMMARY:

More than 20 years experience as a CAD PCB designer. Accomplished in both

commercial and military design. Consistently designing high density, multi-

layer, mixed thru-hole and surface mount PCB. Responsible for design

environment setup/optimization and coordinate to provide solutions.

Formulated, wrote and implemented PCB procedures. Capable of CAE and PCB

library development in CADENCE. Worked in compliance with ISO-900, DFM and

TQM. Main focus, taking a PCB from CAE entry, through PCB design, into

final documentation and PCB fabrication.. CID certified.

CAD TOOLS: PLATFORMS: TECHNOLOGIES:

Allegro, CCT Sun, PC

Surface Mount, Thru-hole

Concept, Orcad

uBGA

Blind/Buried/Micro

Valor

Dig/Analog/RF/Wireless

Network/Telecom/Military

EXPERIENCE:

Intel /Motorola Mobility (Intel purchased our group 2/13) Austin, TX

Mar 07 - Present

Lead Designer (Direct)

. Design PCB's for wireless devices, reference designs for new Baseband

silicon,

large PCB's with heavy RF requirements and large PCB's with high

component count

using high pin count FPGA. Most designs include .4mm pitch uBGA, with

u/blind/buried

vias. Good EMI/RF experience, solid PCB fabrication experience,

comfortable

dealing with PCB manufacturing issues and meeting deadlines.

. Responsible for building ALLEGRO library models. Placed, routed and

guided PCB's through manufacture using. (ALLEGRO, CONCEPT, Rel

16.5)

Ion Design Dallas, TX May 05 - Feb 07

Senior Designer (Contractor) Service Bureau Environment

. Design dense PCB for use in the telecom, network industry. Worked in

conjunction with offsite engineering staff in Austin.

. Responsible for building ORCAD and ALLEGRO library models. Placed,

routed and

guided PCB's through manufacture using. (ALLEGRO, CONCEPT,ORCAD)

Intel/Thomson Chandler, Az Dec 04

- Mar 05

Senior Designer (Contractor)

. Worked in conjuction with Intel/Thomson engineering dept. to design a

new Settop Box

utilizing Intel chip sets. Heavy concurrent design cycle

. Responsible for building ALLEGRO library models. Heavy design

constraints. Placed,

routed and guided PCB's through manufacture using. (ALLEGRO,

CONCEPT)

Circuit Pac Dallas, TX Jun 04 - Nov 04

Senior Designer (Contractor) Service Bureau Environment.

. Design dense PCB for use in the telecom, network industry. Worked in

conjunction with offsite engineering staff in India and China.

. Responsible for building ORCAD and ALLEGRO library models. Placed,

routed and

guided PCB's through manufacture using. (ALLEGRO, CONCEPT,ORCAD)

TDK Richardson, TX Mar 02

- May 04

Senior Designer (Direct) Mainly designed DC-DC converters.

. Design dense PCB for use in the telecom, network and power industry.

Worked in

conjunction with numerous Japanese companies to devise proof of concept

designs.

. Responsible for building ORCAD and ALLEGRO library models. Placed,

routed and

guided PCB's through manufacture using. (ALLEGRO, ORCAD, AGILE)

Celion Networks Richardson, TX Oct 01

- Feb 02

Senior Designer (Contractor)

. Design dense PCB for the Telecom industry, 8-14 layers, extensive design

requirements, heavy SMT with BGA.

. Assisted in defining new PCB procedure, responsible for PCB design

documentation and fab.

(ALLEGRO, CONCEPT, CCT)

Metera Networks Richardson, TX Nov 00

- Sept 01

Lead Designer (Direct)

Metera: Metro Optical Networks for the Telecom industry. (startup)

. Select and negotiate cost of new CAD/CAE system (Cadence).

. Developed and built all CONCEPT and ALLEGRO library models in Rel-14.

Assist in hire and training of other designers.

. Set design milestones, developed procedures/guidelines for CAD dept.

Review and provide design direction for consistent quality designs.

. Completed numerous designs, 10-24 layers while acting as LEAD PCB

DESIGNER.

(ALLEGRO, CONCEPT, CCT)

Surgient Networks Austin, TX Apr

00 - Oct 00

Surgient Network: computer and storage function in one box used in data

centers. (startup)

Lead Designer (Direct)

. Select and negotiate cost of new CAD/CAE system (Cadence).

. Developed and built all CONCEPT and ALLEGRO library models in Rel-14.

Assist in hire and training of other designers. Routed pcb using CCT.

. Set design milestones, developed procedures/guidelines for CAD dept.

Review and provide

. design direction for consistent quality designs.

. Completed numerous designs, 10-24 layers while acting as LEAD PCB

DESIGNER.

Fujitsu Networking Comm. Richardson, TX. May 97 - Apr

00

Senior Designer (Direct)

. Design dense PCB for the Telecom industry, 8-14 layers, extensive design

requirements, heavy SMT with BGA.

. Assisted in defining new PCB procedures for interfacing Fujitsu corporate

wide.

Responsible for all CAE, PCB design documentation and fab.

(ALLEGRO, CONCEPT, CCT, VALOR)

Racal Datacom Sunrise, FL Nov 96

- Apr 97

Senior Designer: Project liaison between Cadence and Racal (Contractor)

. Design dense 14 layer networking PCB using mostly fine pitch and BGA

components, logical/physical CAD library development.

. Chair committee to convert existing CAD standards for Allegro migration.

. Assist existing CAD dept. with overall integration of the Cadence tool

suite.

(ALLEGRO, CONCEPT, CCT)

Alcatel Raleigh, NC

Apr 96 - Jun 96

Senior Designer (Contractor)

. Design high density SMT PCB for the Telecom industry.

. Cost reduction and improve performance of product line using BGA.

(ALLEGRO, CONCEPT)

Tandem Computers Austin, TX Sept 94 - Mar

96

Senior Designer (Contractor)

. Design dense multi layer PCB 2-14 layers for a new fault tolerant

computer.

. PCB required differential pairs matched length, impedance control.

. Critical traces hand routed remaining auto routed.

. Wrote script files for data transfer, wrote PCB procedure manuals to

assist other designers so all designs would have continuity

(ALLEGRO, CONCEPT, ADI)

IBM Raleigh, NC

Jan 94 - Sept 94

Senior Designer (Contractor)

. Design dense PCB 4-12 layer for networking products.

. Established logical and physical library standards, trained others in

library development.

(ALLEGRO, CONCEPT)

Harris Corporation Melbourne, FL Dec 89

- Dec 93

Senior Designer (Direct)

. Design dense multi layer digital and analog PCB for the commercial and

military fields.

. Responsible for library development and complete design process from CAE

to PCB fab.

. Assigned as team leader on a NASA project for development of all new

launch control instrumentation.

(ALLEGRO, CONCEPT, SCI-CARDS, AUTOCAD)

EDUCATION:

A.A. Seminole Community College Lk. Mary, FL

B.S. Aeronautics Embry Riddle Aero. Univ. Daytona Bch, Fl.

Feb 03 CID IPC Certification



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