Engineering Signal Processing
Resume:
Rakesh Chalasani
Voice: 352-***-**** http://cnel.ufl.edu/~rakesh/
E-mail: rakeshch@ufl.edu
Research Machine learning, pattern recognition, neural networks, deep learning, Bayesian methods, kernel
Interests methods, and computer vision.
2010 - Dec. 2013 (expected)
PhD in Electrical and Computer Engineering
Education
University of Florida, Gainesville, Florida, USA.
GPA: 4.00 / 4.00
2008 - 2010
M.S in Electrical and Computer Engineering
University of Florida, Gainesville, Florida, USA.
GPA: 3.92 / 4.00
2004 - 2008
B.Tech in Electronics and Communications Engineering
Visvesvaraya National Institute of Technology, Nagpur, Maharashtra, India
2010 - present
Graduate Research Assistant, Gainesville, Florida USA.
Experience
Computational Neuro Engineering Lab, Uni. of Florida
- Developed a hierarchical dynamic model based on predictive coding to capture temporal re-
lations in a video and used it for generic object recognition.
- Implemented in MATLAB with GPU based acceleration.
- Developed a self-organizing maps based on information theoretic learning principles for data
visualization.
Summer 2012
Research Intern Pittsburgh, PA, USA.
Robert Bosch LLC, Research and Technology Center
- Developed a deep convolutional architecture trained on a large corpus of unlabeled images
obtained from ImageNet.
- Applied it for detecting objects in video surveillance environment.
- Created an interactive MATLAB GUI.
Summer 2007
Summer Trainee, Vishakhapatnam, India
Hindustan Petroleum Corp. Ltd.
- Trained in process instrumentation; understanding the working of industry level distributed
control systems and programmable logic controllers.
• Academic Achievement Award from University of Florida.
Honors and 2008 - 2010
• Awarded as an Outstanding Student for the performance in the state engineering
Awards
entrance examination, Vikas Junior College. 2004
• Selected as one among the 10 student representatives at the Green Olympiad,
conducted by the Ministry of Forests, Govt. of India. 2002
• Packages: MATLAB, GPUmat, VHDL.
Computer Skills
• Languages: C, Python, Java and HTML.
• Operating Systems: Windows, Linux, OSX.
Machine learning Advanced Machine learning
Graduate Course
Pattern Recognition Neural Networks
Work
Compter Vision/Image Processing Automatic Speech Processing
Information Theoretic Learning Reconfigurable Computing
Select Chalasani, R; and Principe, J.C, “Convolutional Dynamic Networks for Video Based Object Recog-
Publications - nition ”, CVPR, 2014 (submitted)
Peer Reviewed
Chalasani, R; and Principe, J.C, “Dynamic Sparse Coding with Smoothing Proximal Gradient
Method ”, ICASSP, 2014 (submitted)
Principe, J.C; and Chalasani, R, “Cognitive Architectures for Sensory Processing ”, Proceedings
of IEEE (submitted).
Chalasani, R; and Principe, J.C,“Self Organizing Maps with Information Theoretic Learning ”,
Neurocomputing (accepted).
Chalasani, R; Principe, J.C; and Ramakrishnan, N, “A Fast Proximal Method for Convolutional
Sparse Coding ”, Neural Networks (IJCNN), The 2013 International Joint Conference on. IEEE,
2013.
Chalasani, R; and Principe, J.C, “Deep Predictive Coding Networks ”, Workshop at International
Conference on Learning Representations (ICLR), Scottsdale, AZ, 2013.
Chalasani, R.; Principe, J.C.; “Temporal context in object recognition ” Machine Learning for
Signal Processing (MLSP), 2012 IEEE International.
Patent Chalasani, Rakesh; and Jose C. Principe, 2013, “Distributive Hierarchical Model for Object
Recognition in Video”, US 61/910,399, Patent Pending.
Talks “Self-Organizing Function Hierarchical Memories with Wake-Sleep Cycle Consolidation.”, ONR
Computational Neuroscience, Vision, & Acoustics Program Review, Washington D.C, 2011.
• Reviewer:
Professional
Involvement - IEEE Signal Processing Letters
- IEEE Trans. on Systems, Man, and Cybernetics
- IJCNN (2010 - 2013)
- IEEE SSCI 2013
• IEEE Student Member. 2005 - present
• Organizing Committee, IEEE VNIT - Student Chapter, Nagpur, India. 2006 - 2007
Contact this candidate