Name : Vaishali Umesh Kawadkar
Address : ***/ ** ***** ***** ******
Contact Details : +91-735*******
Email ID : *****************@*****.***
OBJECTIVE:
To operate in a challenging environment using all my accomplishments and efforts to explore in different disciplines and seek an opportunity for continuous learning
EDUCATION:
2018
Education : Persuing Master of technology in Micro Electronics & VLSI design
Institute : Sam College of Engineering & Technology Bhopal
University : Rajiv Gandhi Prodyogiki Vishwavidyalaya(RGPV)
2015
Education : Bachelor of Engineering in Electronics.
Institute : G. H. Raisoni College of Engineering,Nagpur
(An autonomous institute under UGC act 1956)
University : Rashtrasant Tukdogi Maharaj Nagpur University (RTMNU)
Semester Performance
CGPA : 8.10
Semester
I
II
III
IV
V
VI
VII
VIII
SGPA
7.14
6.41
8.57
8.67
8.58
8.58
7.9
8.67
2011: (HSSC) MadhyaPradesh State Board of Secondary and Higher Secondary Education
Govt. Girls Higher Secondary School
Score: 88.6%
2009: (SSC)
Madhya Pradesh State Board of Secondary and Higher Secondary Educations
Saraswati shishu vidya mandir
Score: 87.66%
PROJECT DETAILS:
Mini Project
Title : Smoke Detector
Guide : Prof. S. V. Bhalerao.
Area of Interest : Sensors and Transducers
Details of Project : It is a device that detects smoke and helps in detecting the fire
Learning Outcome : They are wired up to security monitoring systems or fire alarm control panels.
Major Project:
Title : Artificial Tongue to Detect the Core Taste and color of Liquid vvvv Sample
Guide : Prof. L.P. Thakare
Area of Interest : Embedded system
Details of Project : An Artificial or Portable Electronic tongue is used for the core taste identification(sweet,sour, bitter,salt) and these artificial tongue identifies the combination of all core taste using conductometric method .
Major Project:(Mtech)
Title : A Novel Technique for Low Power,high speed FET based
Level Shifters
Guide : Prof. Santosh Onker
Area of Interest : VlSI Designing
Details of project : This work impacts on the huge potential of Technology
Which can replace bulk MOS & FinFET below 32 nm . This Level Shifter is design to reduces power consumptions in system-on-chips. It reduces additional power consumption & propogation delay that provide minimum power delay product to obtain the potential benefit of using multiple power supply.
TRAINING:
I have underwent an industrial training in Mahindra and Mahindra & M.P.P.G.C.L for period of one month where I have acquired the knowledge of different motors,electronics components and completed two projects and was appraised for my punctuality and sincere efforts throughout training period and have gained effective management skills from my superiors
Training in M.P.P.G.C.L, Sarni, Betul, M.P
Training in Mahindra &Mahindra, Nagpur
One day visit to Parle G
One day visit to SMV Beverages Pvt Ltd
COMPUTER SKILL:
Operating Systems: Windows
Languages: C,C++ VERILOG,VHDL,MATLAB(Beginner)
Packages: MS Office 2007.
.
ACHIEVEMENTS
Secured 1st position in slogan competition at district level.
Secured 1st position in Vedic Maths at National level.
EXTRA CURRICULAR ACTIVITES
Workshop on Web designing
Participated in Skill Enhancement course in lab view
Workshop on Nano technology
Participated in bread board Competition
Workshop on Embedded System
GENERAL PROFICIENCY
Hobby- circuit designing
Foreign Language –French
Technical Report Writing
Research Methodology
Employability Skills
STRENGTHS:
Positive Attitude
Amicable
Flexibility
HOBBIES
Art and craft
Poetry
PERSONAL DETAILS:
Father’s name :Mr.Umesh kumar kawadkar
Mother’s name :Mrs. Sunita kawadkar
Date of birth : 3rd August 1994
Nationality : Indian
Languages known : English, Hindi, Marathi
DECLARATION:
I, The undersigned, hereby declare that the above given information is true to the best of my knowledge.
Date: VAISHALI KAWADKAR
(Name)
Place: