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Design Engineer Project

Location:
Hyderabad, Telangana, India
Posted:
September 19, 2018

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Resume:

CHANDRAKANTH EERANALA

Contact number: 949*******

E-Mail: ac63jl@r.postjobfree.com

CAREER OBJECTIVE:

Seeking for a job to pursue a highly rewarding career and healthy work environment where I can utilize my skills and knowledge efficiently for the organizational growth.

ACADEMIC PROFILE:

Course

Institution

Board /University

Year of Passing

Aggregate B.TECH

(Electrical & Electronics)

Sana Engineering College

JNTUH

2016

76.48

Intermediate

Sri Chaitanya College

Board of Intermediate

2012

96.5

SSC

SPCS Boys High School

Board of Secondary Education

2010

93.2

TECHNICAL SKILLS:

Programming Languages : C, Core Java

Operating System : Windows-XP, Windows-7

Designing Tool : MATLAB

EXTRACURRICULAR ACTIVITIES:

Got First Prize in Technical Quiz in our college event SPONTANIA-2K16.

Secured First place in Essay writing competition held in our school twice.

Participated in National level science camp conducted by SVU, Tirupati.

Secured First place in Final Semester University Examinations

Secured scholarship by National Merit Scholarship in class IX.

ACADAMIC PROJECTS:

MINI PROJECT:

Project Title : Analysis of Cascaded Five Level Multilevel Inverter Using Hybrid Pulse Width Modulation

Role : Project leader

Designing Tool : Mat lab

Description : This paper analyzes the performance of cascaded five level inverter using hybrid pulse width modulation technique. It has been found that this technique reduces the switching losses and total harmonic distortion.

MAIN PROJECT:

Project Title : Effect of a SFCL on Commutation Failure in a HVDC System

Role : Project leader

Designing Tool : Mat lab

Description : It describes an analysis of the effects of a superconducting fault current limiter (SFCL) on commutation failure in a high-voltage direct current (HVDC) system. The SFCL can limit the fault current on the ac side of the converter and thus quickly restore the HVDC system to normal status.

PROFESSIONAL EXPERIENCE:

Company: KREST TECHNOLOGIES- From 2016 to Present As Electrical Design Engineer Responsibilities:

Responsible for electrical drawings, specifications, calculations, charts and graphs

Preparing design models and prototypes of projects using Mat lab software

Preparing project document and giving presentations

Monitoring projects in use to improve on future design

Keeping in line with the latest developments and technology

PERSONAL PROFILE:

Father’s Name : E.Ramakrishna

Mother’s Name : E.Thulasamma

Linguistic Proficiency : English and Telugu

Nationality : Indian

Date of Birth : 28-01-1994

Marital Status : Single

Address : #30-575, kothapeta,Dharmavaram,

Anantapuramu (Dist)-515671

Andhra Pradesh State.

DECLARATION:

I do here by declare that all the information mentioned above are true and correct to the best of my knowledge.

Place :

Date :

(CHANDRAKANTH E)



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