Mask design Engineering

Man V Ha

214-***-**** (C), *******@*****.***

Experienced IC Layout Engineer seeking progressive opportunity leveraging strong understanding of the tools and methodologies.

Skills

•Mask Designer with 20 years of custom analog layout experience

•Strong understanding of basic electrical properties and principals

•Proficient in leading top level layout and coordinating, scheduling, and advising project layout resources to resolve technical problems and meet project schedules and communicate regular status updates.

•Expert in Cadence Virtuoso Layout editor, Mentor ICstation, ICgraph and ICED

•Experience in block and top level layout; floor planning, assembly and physical verification using LVS, DRC, VPS, SPA and other required verification checks.

•Proficient in Bicom, LBC and other technologies, Digital, Analog, Power & mixed Signal designs

Experience

Texas Instruments--Storage, Printers, Integrated Power July 1997 – Present

IC Layout Designer

•Lead various projects over the years in Storage Products group

•Worked closely with the design team to provide high quality layout drawings that conform to schematics, in a timely manner

•Proactively interacted with Design Engineers to provide feedback and implement enhancements to ensure design correctness and robustness.

•Defined floorplan, Pad frame layout, ARC checks and top level routing

•Supported block level layout for critical blocks utilizing best analog layout techniques for device matching, minimizing parasitics, RF shielding, high frequency routing, electromigration, and cross capacitance.

•Worked on small digital blocks using digital auto router

IBM incorporated - Austin May 1995-1997

•Machine Operator

Education

Bachelor’s Degree in Architecture Engineering - (University of HCM, Vietnam)

Associate’s degree in Engineering Design Graphic - (Austin Community College)

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