Peter Cuong Nguyen

**** ******* **

San Jose, CA 95131

408-***-****

ac1pgm@r.postjobfree.com or ac1pgm@r.postjobfree.com

Summary:

Hardware/Product Engineer with more than 20+ years in Engineer and Manufacturing and products operation experience for Cisco System and Juniper Network

Education:

University of Cal-State Hayward: B.S degree in Computer Engineer Graduate on June, 1996

Andrew Hill High School: High School Degree, Graduate on June 1989

Highlights:

DFM, DFA, DFx

Products early engagement Components Issue and Qualification

Failure Analysis Products Value Engineer

Cost Saving Work well under pressure

PCB Issue and Qualification Process Development

Proto and Production Supports Optics

Second source qualification Supplier auditing

Juniper Router and Switches Optics testing

EDVT, MDVT, and HALT testing Team player

4-corners testing Level 2 and Level 3 Testing

Accomplishments:

Juniper top router PTX, MX960, QX5200-32C, RE, FPC, MPC, FPC, MIC, SBC, ect…

Test and debugging QSFP28, QSFP+, XFP, SFP+, Ethernet technology (100 GigE, 40 GigE, 10 GigE, 1000/100/10)

DVT and HALT for high performance Router, Data Center, Switches

Leading member of the new product operation team that designed and engaged in several top-selling Cisco Router Platforms Cisco 2600, Cisco 3600, Cisco 3700, and Cisco 3800, Network Modules, Optical QSFP, and Cisco CPAK-100G-LR4, CPAK-100G-SR10, CPAK-10x10-LR4 Optical Modules

EXPERIENCE:

04/2016 To Present: Juniper Network. Sunnyvale, CA.

Hardware Engineer

Working closely with Design and SW Engineer on proto bring up on Juniper router, switches, MPC, FPC, SBC, and MIC

Setting up Router and Switches configuration

Setting up Spirent traffic configuration for traffic testing

Manage OEM/ODM HW developers to deliver designs on tight schedules from concept to product release

Doing EDVT and HALT on routers and switches

Doing optics qualification on new and sustain routers and switches with traffic, voltage margin, and temperature profile

Troubleshooting Juniper products and OEM optics on link flop issue, physical link down issue, traffic issue, voltage margin, temperature profile and board issue

Troubleshooting and debugging rootcause on router, switches, and optics.

Filling bug reports and work closely with Hardware and Software Engineer to close bug report and corrective action report.

Develop EDVT and HALT test plan on NPI and sustain products

Write test report for EDVT and HALT for NPI and sustainproducts

Working close with optics OEM suppliers on failure analysis, rootcause and corrective action plan.

Doing second source optics EDVT testing on Juniper sustain router and switches

Doing EDVT on VE network platform and optics

Testing and troubleshoot optics under High, Low, and Normal temperatures

Test and verifying new ASIC design

Doing fast and slow ramp testing on router and switches

Testing and troubleshoot optics using spooling for reaches

Testing and troubleshoot optics using Spirent traffic generator

Testing and troubleshoot optics using loopback

Doing software JUNOS and Diag testing on new and existing platform

Modify test script using TeraTerm, Ptty, and Unix

Working with customers on release product issue and drive the issue to closer

Working with third party test lab for HALT testing and schedule

Trouble shoot HALT test issues under cold temperature, hot temperature, vibration, RTC5, RTC300, and extended test

Review third party HALT testing report

Work closely with third part HALT test lab on schedule and test plans

Review BOM, lay out, and PCB on NPI

Engagement with Design and Software Engineer on NPI products

Deep knowledge of product development life cycle

Familiar with CLI command and VI command

09/05 To 04-2016: Cisco System Inc. Milpitas, CA.

Technical Lead Electrical /Mechanical Product Engineer

Product Engineer Lead:

Mentor new Product Engineer members on MFG process.

Provide technical training to new Product Engineer members.

Manage NPI and sustain projects and products within the group.

Track all products to release on time.

Travel to new OEM suppliers for auditing.

Provide process training for new OEM suppliers.

Provide and review all new products test plan.

Work closely with CM and OEM suppliers on NPI products

Work closely with CM on new MFG process

Work closely with NPPM on value engineer for product cost saving

PCB Board:

Working with SI Engineer on design stackup to meet design impedance, trace width, board layers, board thickness, tolerance, and meet Cisco stackup specification

Working with Fab Supplier to meet and review Cisco design stackup

Working with CAD Engineer on board layout and fabout for no issue on broken netlist, component spacing, silkscreen, panelization, array, thieving on inner and outer layer, bevel, panel breakaway area, and meet Cisco producibility Guideline.

PCB Board Qualification:

Working with Fab suppliers to review DFM for board thickness, thieving, panel size, array, fab material, material usage, fab technology level, surface finish, board dimension, and fab qualification

Working with CM on DFA and DFx review for component spacing issue, silkscreen issue, component mismatch issue, component footprint issue, panelization issue, reference designator, and BOM and fab mismatch

Products Design engagement:

Working with Design Engineer at the design early stage on BOM load, components risk, components ROHs, components second source, and BOM and schematic mismatch

Failure Analysis:

Working with Design Engineer on board bring on proto board for any issue such as power up, boot up, FW program, and components issue

Provide technical supports for CM during proto and production build for issue on component demage, power up, board programing, module test failure, Parametric test failure, EDVT and MDVT, optical masking issue, and optical mask issue

Working with CM and suppliers on failure analysis for rootcause, and mitigation plan

Review FA report to prevent future issue

Write technical support document for CM to debug the product

Travel to CM to provide technical training for release products

Provide technical supports for internal and external on release product

Provide technical supports for FAI(First Article Inspection)

Process Development:

Develop new process for product release for quicker time to market, develop OASIS process, develop BOM release process, develop material pipeline and material incoming and outgoing inspection process, provide process training for new Cisco Electrical Engineer, travel to CM to provide training on new process on proto and production build

Mechanical Engineer:

Working with Mechanical Design Engineer on top shell, bottom shell, prizm cable, latch, thermal pad, fibber array, dimension, and mechanical BOM load

Working with Packaging Engineer on product packaging to customers

Working with CM on travel label and Brand protection label layout and dimension

Provide technical supports on mechanical issue

Working with suppliers on developing mechanical parts

Do FAI for all incoming mechanical parts

Cisco Tools:

Inbiz, Valor, ECO, CUP, Deviation, PNR, MCN, BOMARs, Agile, CLEI code

Certification:

FMEA Training for QEs and NPI PACT and GECO Changes for RoHS

PCB Design of High Speed Circuit Valor, and ePD

Code of Business Conduct PCB Part Number Qualification

NPI Metrics training for NPPMs BOM Introduction

Cisco Systems Laboratory Safety 2005 ESD Training Program

ECO Classifications L1/L2 Component Qualification,

Printed Circuited Assembly Board

01/02 To 09/05 Verplex System, Inc. Milpitas, CA.

Application Engineer

Duties Included:

Worked on new functional formal verification software checker tool. Debugged and reported bugs to R&D on functional verification tool. Worked with real customer design test cases on functional verification tool. Debugged customer designs to work with the function verification tool. Converted all design test cases from use in equivalent checking to test new version of functional design verification product and checked in for regression. Tested all commands in functional formal verification tool with different Verilog, VHDL, and mixed language designs. Written design test cases in Verilog, VHDL, and mixed languages to test software tool modeling, automatic, and predefined checks. Experienced with Verilog and VHDL simulator tools. Used functional verification commands to fix Bus, Tri-State, Set and Reset problems with flip-flops, and multi-port problems with latches. Tested functional verification tool to check for clock, clock domain crossing problems, finite state machine problems, primary inputs problems, static property problems, flowing signal problems, pin constraint problems, read in library problems, and read in design problem before product is released. Tested schematic viewer to see if the schematic is correct with the designs. Written Unix C-Shell scripts for automatic testing on functional verification tool. Worked with R&D development engineers on new commands for functional verification tool. Worked with Technical Writer to write User and Reference Manuals for functional formal verification tool. Written test procedures for functional verification tool. Help QA Engineers to test functional verification tool. Supported Field Application Engineers on functional verification commands and new commands. Written Application Notes and papers for functional verification tool.

03/00 To 1/02 Lexar Media, Inc. Fremont, CA.

Field Application Engineer

Company product: USB Compact Flash, PCMCIA PC Cards, Memory Stick, USB CF/SM Reader, Parallel Reader, and 1394 Readers.

Duties Included:

Troubleshooting and Debugging: Troubleshot device under Window9x, WindowsNT and 2000, Windows Millennium, Windows XP, and Mac 8.6 through Mac X. Troubleshot configuration problem with different types of USB chipset and PCI chipset. Troubleshot configuration problems with different CardBus controllers. Troubleshot Timing, Multi Write, and Reset to Ready problems using USB Bus Analyzer. Troubleshot and decoded Windows blue screen fatal errors. Troubleshot driver problems with installer and uninstaller problems. Troubleshot MP3 Player, MP3 Music Software, PDA device and software, Windows Media Player. Tested and debugged all driver issues and all incoming products before releasing to DVT Team for more testing. Performed black box and white box testing for Lexar media flash memory controller and reader controller. Great knowledge of PC architecture.

Programming: Written tests script in DOS and batch files. Modified drivers for WHQL Windows98, Widnows 2000, Windows Millennium, and Windows XP logos. Worked with Developer Team on Drivers and Upgrade Firmware issues.

Technical Support for OEM: Worked with Microsoft Development Team on Plug and Play issues, Windows issues, WHQL Logo issues, USB serial number issues, and other issues involve with Operating System. Provided Technical Support for Product Marketing, Technical Support, OEM Marketing Team, DVT Team, and Marketing Communication Team. Worked with other OEMs on trouble shooting Compact Flash under Camera and Operating System environment. Provided Pre and Post Sales support for Marketing. Gave presentation on Lexar Media devices and technical training classes for OEM, Technical Support, and Marketing Team. Attended Windows Developer and Conference Meeting, Microsoft Plug Fest, Microsoft WHQL Conference Meeting, Intel Development Form, Trade Shows, and other technical shows and conference meetings.

Testing and Writing Documentation: Written batch files and test scripts using DOS and Macro Script Software. Performed all Microsoft Beta testing and filed bug reports for new Operating System. Tested all new device or Operating Systems before releasing to DVT Team. Written Test Plans, Test Procedures, and Test documentation for all testing devices. Written up Application Notes and Errata. Tested and debugged new design products.

Maintaining DataBase and WindowsNT Server: Setup and maintained WindowsNT server and Database for Application Team and Technical Support Team. Used Soffront Track32 DataBase Application to setup users, user group, Forms, Records, Mail server, Queries, Reports, Form layout, Tables, and Graphs.

06/97 To 03/00 O2Micro, Inc., Santa Clara, CA.

Validation Engineer

Duties included:

Debugged Notebook and PC hardware and software components. Performed black box and white box testing on PCMCIA and Card-bus controller. Tested and debugged Card-bus Controller board under DOS, Windows95, Windows98, WindowsNT, and Windows 2000 with ACPI and PME. Performed problem analysis on 32-bit and 16-bit PCMCIA cards. Debugged all Card-bus and PCMCIA cards that fail during the test. Performed Beta testing and reported problems to Microsoft. Performed WHQL testing new products. Setup TCP/IP, NetBEUI, IPX, DHCP, Hub, Port, and Token-Ring for testing Network cards and Wireless Network cards. Troubleshot Card-bus and PCMCIA Network cards, Wireless Network cards, SCSI cards, Flash Memory cards, DVD cards, MPEG cards, Video Graphic cards, Modem cards, and Ethernet + Modem cards. Provided 80% of technical support for end user and Marketing team on phone, e-mail, and on-site services. Written Procedure and Compatibility testing reports and technical reports for customers. Worked closely with vendors on problem solving. Tested all different types of PCI chipset and motherboard. Great knowledge of PC architecture.

1/92 To 10/95 MicroNiche Information System Inc., Fremont, CA.

Technical Support Engineering

Duties included:

Provided technical information on computer products to end-user customers and distributors. Setup system configurations and integration tasks to meet customer requirements. Tested and repaired returned merchandise. Documented unknown problems, and provided technical feedback to sales and productions to ensure satisfied services.

ACTIVITIES: Member of the Cal-State University of Hayward Vietnamese Club.

REFERENCE: Available Upon Request

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