Computer Science Project

Dr. AMIT SEHGAL

S/O Mr. K. C. Sehgal

D.O.B. : ** – 12 – 1979

Tel. No. – 27565218 (R), 987-***-**** (M)

Email : *************@*****.***

URL: http://people.du.ac.in/~asehgal/

Address: D – 42, Prashant Vihar,

Rohini,

Delhi – 110085

3+ years of teaching experience at Delhi University

7 years of research experience (Modeling of Semiconductor Devices)

With 26 publications produced in journals and conferences

Impact factor of 12.201.

B. Sc. (Hons)

2000

Delhi University

Electronics

Electronics

75.67%

First

10+2

1997

C.B.S.E.

Physics, Chemistry, Maths, English, Computer Sc.

76%

First

Thesis title –crystalline Silicon Thin Film Transistors: Modeling, Simulation and Characterization is submitted to Univ. of Delhi.

Cleared UGC NET December 2002 Examination and qualified for both Junior Research Fellowship and Lectureship.

COMPUTER AND MICROPROCESSOR KNOWLEDGE:Can operate computer efficiently in Windows, MS Office, Internet, MathCAD, and Microsoft Origin etc.Can install Windows efficiently on Personal Computers.Computer Languages known = FORTRAN, PascalMachine and Assembly Languages known = 8085, 8086Done device simulation using ATLAS simulator

ACHIEVEMENTS:Biography listed in Marquis Who's Who in World 25th Anniversary Edition issue.Biography listed in Marquis Who's Who in Asia December 2006 issue.Biography listed in Marquis Who's Who in Science and Engineering September 2006 issue.

MEMBERSHIPS:SID (Society For Information Display) Member Society of VLSI and Microelectronics MemberMaterial Research Society Singapore Member

EXPERIENCE:

Work Exposure

Name of the Post

Nature of the Job

Duties

Name of Organization

Period

From

To

Lecturer

(Electronics)

Permanent

To teach undergraduate students

Hansraj College, University of Delhi

17-02-05

Till date

Visiting Faculty

(Computer Science)

Temporary

To teach undergraduate students

Hansraj College, University of Delhi

17-07-05

Till date

Visiting Faculty

(Computer Science)

Temporary

To teach undergraduate students

Shyama Prasad Mukherjee College, University of Delhi

12-12-08

Till date

Visiting Faculty

(Computer Science)

Temporary

To teach undergraduate students

Shyama Prasad Mukherjee College, University of Delhi

01-09-08

05-11-08

Visiting Faculty

(Computer Science)

Temporary

To teach undergraduate students

Indraprastha College of Women, University of Delhi

09-01-07

26-04-07

UGC - JRF

Temporary

Research

Dept. of Elec. Sc., Univ. of Delhi

(South Campus)

01-02-04

16-02-05

Project JRF

Temporary

Research

Dept. of Elec. Sc., Univ. of Delhi

(South Campus)

12-02-03

31-01-04

Working on research topic Modeling, Simulation & Characterization of Semiconductor Devices (especially poly-silicon Thin Film Transistor and Nano-scale MOSFETs) with Prof. R. S. Gupta (supervisor) at Dept. of Elec. Sc., Univ. of Delhi (South Campus), N. Delhi -21.

Administrative Experience

Year 2008 – 2009

Member – Admission Committee & B.Sc. (Honors) Electronics Admission In-charge

Member – Canteen Committee

Member – Portal Committee

Convener – Department Student Society

Member Departmental Purchase Committee

Year 2007 - 2008

Convener – Student Welfare Committee

Member – Finance Committee

Member – Portal Committee

Convener – Departmental Purchase Committee

Member – Department Time Table Workload Committee

Year 2006 - 2007

Member – Student Welfare Committee

Member – Departmental Purchase Committee

Research Experience

Published 26 research articles in international/national journals and conferences. (List of Publications in Appendix A)

Doing research work on topics Modeling, Simulation & Characterization of Short Geometry Poly-silicon Thin Film Transistor Modeling, Simulation & Characterization of MOSFETs with quantum mechanical effects for ULSI applications

from September, 2002 onwards till date.

ProjectsCompleted project titled Fabrication of Porous Silicon and Study of its Resistive Behavior under different Environmental Conditions for the partial fulfillment of award of degree of M. Sc. in Electronics under guidance of Dr. V. K. Jain (Add. Director / Scientist G SSPL) and Prof. R. M. Mehra (Univ. of Delhi) at Solid State Physics Laboratory, Ministry of Defence, Timar Pur, New Delhi. Completed project titled Designing and Testing of Successive Approximation Digital Voltmeter by interfacing with 8085 Microprocessor Kit for the partial fulfillment of award of degree of B. Sc. (Hons) Electronics at Electronics Laboratory, Keshav Mahavidyalaya, University of Delhi, Keshav Puram, New Delhi. Designed software based project titled Telephone Billing in Pascal Programming for the award of 10+2 passing certificate.

(AMIT SEHGAL)

Appendix A

List of Publications

International/Indian Journals

Published Optimization of gate stack MOSFETs with quantization effects, Tina Mangla, Amit Sehgal, Manoj Saxena, Subhasis Haldar, Mridula Gupta and R. S. Gupta, . Temperature dependence on electrical characteristics of short geometry poly – crystalline silicon thin film transistor, Amit Sehgal, Tina Mangla, Mridula Gupta and R. S. Gupta, Sub threshold analysis and drain current modeling of poly-silicon thin film transistor using green’s function approach Amit Sehgal, Tina Mangla, Sonia Chopra, Mridula Gupta and R. S. Gupta, Physics-based algorithm implementation for characterization of gate-dielectric engineered MOSFETs including Quantization effects, Tina Mangla, Amit Sehgal, Manoj Saxena, Subhasis Haldar, Mridula Gupta and R. S. Gupta, Physics based threshold voltage extraction and simulation for poly-crystalline thin film transistors using a double-gate structure, Amit Sehgal, Tina Mangla, Sonia Chopra, Mridula Gupta and R. S. Gupta, Enhancement in performance of poly-crystalline thin film transistors with gate dielectric and work-function, Amit Sehgal, Tina Mangla, Sonia Chopra, Mridula Gupta and R. S. Gupta, Analytical modeling of the kink regime of a short channel polycrystalline silicon thin film transistor, Sonia Chopra, Amit Sehgal and R. S. Gupta, Enhancement in performance of sub-100nm MOSFETs using gate stack architecture, Tina Mangla, Amit Sehgal, Mridula Gupta and R. S. Gupta, Modeling and simulation of poly-crystalline silicon thin film transistor for improved gate transport efficiency, Amit Sehgal, Tina Mangla, Sonia Chopra, Mridula Gupta and R. S. Gupta, Modeling challenges in sub-100nm gate stack MOSFETs Tina Mangla, Amit Sehgal, Mridula Gupta and R. S. Gupta, Modeling Aspects of sub-100nm MOSFETs for ULSI device applications, Tina Mangla, Amit Sehgal, Mridula Gupta and R. S. Gupta, Multi-material gate poly-crystalline thin film transistors: Modeling and simulation for an improved gate transport efficiency, Amit Sehgal, Tina Mangla, Sonia Chopra, Mridula Gupta and R. S. Gupta, . Poly–crystalline silicon thin film transistor: a two–dimensional threshold voltage analysis using Green’s function approach, Amit Sehgal, Tina Mangla, Sonia Chopra, Mridula Gupta and R. S. Gupta, .

International/Indian Conferences

Published temperature dependent threshold voltage modeling of short geometry poly Si TFT, Amit Sehgal, Tina Mangla, Mridula Gupta and R. S. Gupta, National Symposium on Advances in Microwaves and Lightwaves (NSMAL-2003), 13-14 October, University of Delhi, South Campus, New Delhi, India, 2003, pp. 116-119. Temperature dependent electrical characteristics of short geometry Poly Si TFT for high frequency applications, Amit Sehgal, Tina Mangla, Mridula Gupta and R. S. Gupta, National Conference on Radio Science in India (INCURSI – 2003), 27-29

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