Software Engineer Project
Resume:
Resume keywords summary: LTE, 3GPP, PHY ( L1), MAC, RLC, PDCP
Contact Information
Please log in to see the contact information!
Work Experience
Experience level: 2-5 years
Profile/Cover Letter: Manish Kumar
**********@*****.***
Amagasaki City, Hyogo 662-8661,
Japan
Name & Address of Employer
Aricent Technologies Pvt. Ltd.
Electronic City, Plot 17, Sector 18,
Gurgaon-122015
Haryana, India
Office +91-124-*******
Educational Details
2008 M.C.A. Panjab University, Chandigarh 70%
2003 B.S.C Panjab University 63%
2000 10+2 P.S.E.B 51%
1998 10th P.S.E.B 84%
IT Skill Set
Languages C, Data Structure
Development tools Version Control (SVN and CVS), Purify, GDB and Purecov
Operating Systems Linux and Windows
Boards RMI, Cavium, Freescale, Nehalem and ARM Boards
Experience Details
Dates of Employment
Jan 2011 Till Date Aricent Technologies Pvt. Ltd. Senior Software Engineer
July 2008 Dec 2010 Aricent Technologies Pvt. Ltd. Software Engineer
Job Profile
Having 4 years experience of extensive experience in LTE eNodeb ( MAC, RLC Layers) in Aricent Technologies Pvt. Ltd. with all phases of software development (SDLC) from requirements gathering to post-implementation.
Spectrum of current responsibilities includes research for new features, writing algorithms, Component Design & customization using C, Linux.
Outstanding ability to be a major contributor in the delivery of todays cutting edge technological solutions.
Projects Undertaken
Project LTE Integration (Amagasaki City, Hyogo JAPAN)
Duration 5 Months ( JAN 2012 to till date)
Position Senior Software Engineer
Description Project involves the integration of eNodeB-Framework (MAC, RLC, PDCP) with third party PHY, L3, Core N/W and & Aeroflex TM 500 UEs.
This integration involves complete Signaling and DRB establishment. With the successful DRB creation, Downlink and Uplink data flow is established (eNB to UE).
Following is the list of messages/flow cleared through this integration.
Successful MIB Decoding
Successful SIB/SI Decoding
RACH Procedure
PDCCH Order
NAS Procedures
DRB Establishment
DRX Procedures
Paging
Responsibilities Requirement analysis (Signaling Procedures, Logical and Transport Channels, Physical Layer Requirement). System Level Testing and Integration Testing.
Platforms/tools C, Linux, gdb, CVS, purify, purecov and wireshark
Project LTE RLC Layer Development (Aricent Technologies Pvt. Ltd, India)
Duration 3 Months ( Oct 2011 to 31 Dec 2011)
Position Senior Software Engineer
Description RLC performs segmentation and reassembly and operates in three modes transparent mode (TM), acknowledged mode (AM) and unacknowledged mode(UM). The RLC provides in-sequence delivery and duplicate detection.
RLC functionality includes the following
Concatenation, segmentation and reassembly of RLC SDUs (UM/AM)
Reordering of RLC data PDUs (UM/AM)
Duplicate detection (UM/AM)
RLC SDU discard (UM/AM)
RLC re-establishment (AM)
Status/PDU Segment (AM)
Responsibilities Requirement analysis, complete software development cycle which includes Design document preparation (both High Level and Low Level), coding, code review, UTP preparation and testing both Unit and System level.
Platforms/tools C, Linux, gdb, CVS, purify, purecov and wireshark
Project LTE Integration (MUMBAI, INDIA)
Duration 9 Months (1 Jan 2011 to 30 Sept 2011)
Position Senior Software Engineer
Description Project involves the integration of eNodeB-Framework (MAC, RLC, PDCP and RRC) with third party PHY and Sequans & Aeroflex TM 500 UEs.
This integration involves complete Signaling and DRB establishment. With the successful DRB creation, Downlink and Uplink data flow is established (eNB to UE).
Following is the list of messages/flow cleared through this integration.
Successful MIB Decoding
Successful SIB/SI Decoding
RACH Procedure
NAS Procedures
DRB Establishment
Responsibilities Requirement analysis (Signaling Procedures, Logical and Transport Channels, Physical Layer Requirement). System Level Testing and Integration Testing.
Platforms/tools C, Linux, gdb, Clear-case and wireshark
Project LTE MAC Layer (FDD, TDD) Development (Aricent Technologies Pvt. Ltd, India).
Duration 2 years 6 Months (3 July 2008 to 31 Dec 2010)
Position Software Engineer
Description Project involves the development of very complex MAC Layer of LTE which includes both downlink and Uplink procedures.
MAC Layer development is very challenging as specifications are still evolving and
also considering that MAC needs to perform its task well within 1 millisecond (LTE
Requirement). MAC functionality includes the following
PDCCH Allocation
PDSCH Allocation
Multiplexing/Encoding of Transport Block both for Single/Dual TBs (MIMO)
De-Multiplexing of Transport Blocks received from the UE
Random Access Procedure
Broadcast Messages (MIB/SIB and SI)
Paging Messages
CQI Handling
PUCCH Allocation
Responsibilities Requirement analysis, complete software development cycle which includes Design document preparation (both High Level and Low Level), coding, code review, UTP preparation and testing both Unit and System level.
Platforms/tools C, Linux, gdb, CVS, purify, purecov and wireshark
Personal Detail
Fathers Name Sh. Trilok Chand
Date of Birth 08th September 1981
Sex Male
Marital Status Married
Languages English, Hindi, Punjabi
Address #2925A, Gate No. 3, Sec 23, Gurgaon, Haryana, India
Personal Attributes Quick Learner, Smart Worker, Adaptive by nature
Declaration
I hereby declare that all the above written particulars are true to best of my knowledge.
Manish Kumar
Employer: Aricent Technologies
Job Title: Senior Software Engineer
Start Month/Year: 07/2008
End Month/Year: Current
City: Gurgaon
Country: India
Description: Not Specified
Background and Experience
Education Level: Master's Degree
School Name: Panjab University
Major: Master of Computer Applications
City: Chandigarh
Country: India
Graduation Date: 01/04/2005
Job Category: 4g/LTE/IMS Wireless Mobile Communication Jobs
Job Type: Any Job Type
Job Status: Flexible
Desired Salary: $0 Unspecified
Desired Location: Not Specified
Willing to Relocate: Yes
Contact this candidate