Dr. SHEETAL J. PATIL
Post Doctorate Fellow
Microelectronics branch
Department of Electrical Engineering
Indian Institute of Technology Bombay,
Powai, Mumbai, India
Phone:- +91-22-257*-****
E-mail:- *******@**.****.**.**
AREAS OF INTEREST
EDUCATION
Doctor of Philosophy (Ph.D.) in Electronic Science
(Department of Electronics Science)
Specialization : Thin films processing (Material Science)
Institute : University of Pune
Awarded date : July 2004
Master of Science (M. Sc.) in Electronic Science
Major : Electronic Science
Institute : Department of Electronic Science,
University of Pune, India
Post Graduation : June 1998
Bachelor of Science (B.Sc.) in Electronic Science
Major : Electronic Science
Institute : Modern College,
University of Pune, India
Graduation : June 1996
RESEARCH EXPERIENCE
From
To
Name and Address of Company / Organization
Position held
April 2004
Till date
Microelectronics group
Dept. of Electrical Engg.
IIT Bombay, Powai,
Mumbai 400 076
Post Doctorate Fellow
(PDF)
August 2001
March 2004
Dept. of Electronic Science
University of Pune, Pune
411 007
CSIR-India sponsored Senior Research Fellow (SRF)
Dec. 1998
July 2001
Dept. of Electronic Science
University of Pune, Pune
411 007
Junior Research Fellow (JRF) (BRNS sponsored project)
July 2000
Oct. 2000
Modern College, University of Pune
Lecturer
June 1998
Dec. 1998
Dept. of Electronic Science
University of Pune, Pune
411 007
OHP Software Developer
PROJECTS & SEMINARS UNDERTAKEN
Ph. D. TopicDeposition and characterization of Nitride and/or Oxynitride films of Silicon and Indium in an In-House fabricated, Activated Reactive Evaporation (ARE) System.
Guide: Prof. S. A. Gangal
M. Sc. Project Development of Voltage Clamp instruments for Cell Characterization
Guide: Dr. A. D. Shaligram
Project Like Experiment
B. Sc. projectDevelopment of data acquisition system using 8085 microprocessor
Guide: Dr. S. Deuskar
PROFICIENCY IN
1. Programming Languages : C, C++ and HTML 4.0
2. Graphical Packages : Corel 9, Adobe Photoshop 5.0, Illustrator 7.0, Fractal
Designer, Origin 6.0
3. Operating Systems : MS-DOS, Windows 9X, 2000 & WINDOWS-NT
4. Web Packages : Front Page 2000, First Page 2000, Java Designer
Experience in semiconductor processing
Working in Microelectronics lab (Class 1000) of Department of Electrical Engineering at I.I.T. Bombay, INDIA. I am having expertise on following systems: -Activate Reactive Evaporation (ARE) systemThree zone Oxidation/Diffusion Furnaces from M/sTempress, General signalElectron Beam Vacuum Coating Unit M/s Edwards Vacuum systems Thermal Evaporation System M/s HindHivac Vacuum systemsMask aligner M/s Indo French High tech Equipment DC and RF Plasma Sputtering SystemMillipore and Barnstead DI water plant set upRCA and Ultra sonic cleaning set upEllipsometer M/s Sentech Ellipsometer (SE800)Thorough knowledge of operation and maintenance of clean workbenches (class 100) and clean rooms (class 1000)
X-ray Photoelectron Spectrometer
CHARACTERIZATION TECHNIQUES KNOWN X-Ray Diffraction (XRD)X-ray Photoelectron Spectroscopy (XPS)Energy Dispersive Analysis of X-ray (EDAX)Fourier Transform Infra-Red Spectroscopy (FTIR)
PUBLICATIONS
International JournalSheetal J. Patil, Dhananjay S. Bodas, A. S. Ethiraj, R. C. Purandare, G. J. Phatak, S. K. Kulkarni and S. A. Gangal. Vacuum 65/1 (2002) 91-100 . Sheetal J. Patil, Dhananjay S. Bodas, G. J. Phatak and S. A. Gangal. Bull. Mater. Sci. 25/5 (2002) 399-402 .Sheetal J. Patil, Dhananjay S. Bodas, A. B. Mandale and S. A. Gangal, Thin Solid Films 444 (1-2) (2003) 52-57 .Sheetal J. Patil, Dhananjay S. Bodas, A. B. Mandale and S. A. Gangal Accepted for Publication to the Journal Appl. Surf. Sci. .Dhananjay S. Bodas, Sheetal J. Patil, A. B. Mandale and S. A. Gangal, Accepted for Publication to the Journal of Appl. Poly. Sci. 91-200*-****-**** .Dhananjay S. Bodas, R. V. Dhabhade, Sheetal J. Patil, and S. A. Gangal, Proc. MHS-2001 IEEE; 51-56 .
National JournalDhananjay S. Bodas, R. V. Dhabhade, Sheetal J. Patil, and S. A. Gangal, Journal of Indian Institute of Science 81/6 (2001) 645.
ConferencesDhananjay S. Bodas, R. V. Dabhade, Sheetal J. Patil, and S. A. Gangal, National Seminar on Physics and Technology of Sensors (NSPTS-9) at Dept. of Electronic-Science, University of Pune, India, March 2002, p-C-33-1Sheetal J. Patil, Dhananjay S. Bodas and S. A. Gangal, ‘IVSNS 2001’ at IISc. Banglore India 2001.Dhananjay S. Bodas, R. V. Dhabhade, Sheetal J. Patil, and S. A. Gangal, ‘IVSNS 2001’ at IISc. Banglore India 2001.Sheetal. J. Patil, G. J. Phatak and S. A. Gangal National Seminar on Physics and Technology of Sensors (NSPTS-8) at IGCAR, Kalpakam, India, Feb. 2001, p-49. Dhananjay S. Bodas, Sheetal J. Patil, and S. A. Gangal, National Seminar on Physics and Technology of Sensors (NSPTS-8) at IGCAR, Kalpakam, India, Feb. 2001, p-48.S. J. Patil, G. J. Phatak, and S. A. Gangal, National Seminar on Physics and Technology of Sensors (NSPTS-7) at Dept. of Electronic-Science, Univ. of Pune, India, March 2000, p-C-59-1S. J. Patil, N. A. Kulkarni and S. A. Gangal, National Seminar on Physics and Technology of Sensors (NSPTS-6) at Thapar Institute, Patiala, India, Mar 1999 p-C-36
CommunicatedSheetal J. Patil, K. C. Mohite, A. B. Mandale, M.G. Takawale and S. A. Gangal, Characterization of ‘ARE’ deposited silicon nitride films and their feasibility of antireflection coating communicated to the journal Surface Science and coating technology . Dhananjay S. Bodas, Sheetal J. Patil, A. B. Mandle and S. A. Gangal, PMMA as an etch mask for silicon micromachining, communicated to the journal, Smart Materials and Structures .
MANAGEMENT EXPERIENCE
As a system In charge for various furnaces and equipments As a lab In charge of Microelectronics lab, Department of Electrical Engineering, IIT-Bombay. (Nov 04 – till date)
PROFESSIONAL OBJECTIVE
Seeking excellence in the chosen professional field through self-motivation, hard work and augmentation of core skills required to effectively deliver goods. Striving to achieve excellence through selective and focused pursuit of the short and long-term goals and trying to create an environment through my chosen organization and work field where knowledge and excellence are given their due.
FAVORABLE PERSONALITY TRAITS
Commitment to work, adaptability, goal oriented person, problem-solving abilities, Comfortable with teamwork, good coordination and persuasion skills.
PERSONAL DETAILS
Date of Birth : 1st Nov 1975
Marital Status : Single
Category : General
Nationality : Indian
Current Status : Post Doctorate Fellow
Microelectronics Group
Department of Electrical Engineering,
Indian Institute of Technology (I.I.T) Bombay,
Powai, Mumbai 400 076, INDIA
Present Address : Hostel No. 11, Room No. 233
IIT – Bombay, Mumbai - 400076
Permanent Address : 6th lane, Jaymala nagar, Near Ambi Hospital
Sangavi, Pune-411 027,
Phone: +91-20-272*-****
Languages Known : English, Hindi & Marathi
Hobbies : Reading, singing, traveling & watching movies
Indoor games : Chess, Carom, Cards
E-mail : *******@**.****.**.**, *********@*****.**.**
REFERENCES
Prof. V. Ramgopal Rao
Microelectronics branch
Department of Electrical Engineering
Indian Institute of technology, Bombay
Powai, Mumbai, INDIA
E- mail: ****@**.****.**.**
Prof. Rakesh Lal
Microelectronics branch
Department of Electrical Engineering
Indian Institute of technology, Bombay
Powai, Mumbai, INDIA
Email: ****@**.****.**.**
Prof. (Ms.) S. A. Gangal
Department of Electronics Science
University of Pune, Pune 411 007
INDIA
Email: ***@***********.*******.*****.**