Shubhi Yadav
Email: *********@********.***
Address: **** * **** ******
City: Milpitas
State: CA
Zip: 95035
Country: USA
Phone: 817-***-****
Skill Level: Entry
Salary Range: $85,000
Willing to Relocate
Primary Skills/Experience:
See Resume
Educational Background:
See Resume
Job History / Details:
Shubhi Yadav Phone: 817-***-****
1001 S. Main Street, F-304, Milpitas CA 95035 Email: ************@*****.***
Objective
Seeking a full time opportunity in the field of Electrical Engineering.
Education
MSEE University of Texas at Arlington, Texas Graduation: Aug 2012 BSEE University of Mumbai, India Graduation: June 2010
Work Experiences
System Design Intern Intersil, Milpitas, CA May 2012- Present
* Working in the Analog and Mixed Signal System team for the board level development of FPGA based 2D MEMS Optical Sensor for Pico-Projector.
* Responsible for the power designing and characterizing the sensitivity of Optical Sensor with different RGB Lasers.
* Carrying out various experiments with different analyzers to obtain the desired result using LabView.
System Engineering Intern, Rambus, Sunnyvale, CA May 2011- Dec 2011
* Worked in the Architecture team to carry out the design of a high speed circuitry. Optimized the nature of errors transmitted when interfaced with memory systems like GDDR5 and DDR3.
* Developed bring-up codes for the test chip in C language by defining its various parameters and successfully carried out its interfacing with other test chips.
* Used PERL Language for extracting results obtained from the experiment and carried out the post processing analysis to obtain desired data.
Project Trainee, Bhabha Atomic Research Centre, Mumbai, India May 2009- May 2010
* Designed a FPGA for low noise data acquisition system.
* ASIC designing of interface between 8 delta sigma 24 bit ADC (ADS 1672) and Flash Memory (Samsung K9NCG08U5M) using low power FPGA and STR91XFA ARM Microcontroller.
* Coded using the VHDL language and simulation was carried out by using Libero Gold IDE.
* Used buffers for data storage and for avoiding speed disparities in the system. Developed the logic using multiplexers, control blocks and decoders.
Certification
IBM Certified Specialist -- Tivoli Storage Manager Express V5.3.7
Technical Skills
Programming Languages: C/C++, PERL
Hardware Related Language: VHDL,Verilog
Development environments: Keil, MPLAB, MATLAB, Labview, Pspice,AutoCAD.
IC Layout: Cadence Virtuoso
Communication / Buses Protocol: I2C, RS232, RS485, USB, SPI
Assembly Languages: INTEL 8051/8085/8086/ PIC 24F.
Courses
Microcontrollers and Microprocessors, Embedded Microcontrollers, Advanced Embedded System, Analog Integrated Circuits and Designs, VLSI designs, ASIC CMOS Design,Digital Signal Processing,, Digital Design Systems, Computer Architecture, Data Communications and Computer Networking, Wireless Communication, Neural Networks, MEMS systems, Digital Image Processing, Statistical Signal Processing.
Academic Projects
Two- Way Communication System using PIC 24FJ64GA002
* Developed a protocol for communication between two PIC 24FJ64GA002 controllers and implemented it using Embedded C Programming.
* The master controller takes commands from the computer using RS 232 interface, parses it and sends the command over RS - 485 to the slave controller which decodes the command and executes it.
Webpage Server Implementation on Microchip PIC 24F Microcontroller
* Implemented a web server on the PIC 24FJ64GA002 controller by interfacing it with ENC28J60 Ethernet controller by developing a C code.
* The PIC and client communicates using the TCP/IP protocol. On receiving a webpage request from client, TCP connection is set up and data is sent to the client over the Ethernet link.
SDRAM Controller Design
* Design of SDRAM controller that interfaces 8086 microprocessor with external SDRAM memory.
* Simulated logic development for generating signals using multiplexers, logic gates, and counter.
Implementation of Real Time Operating System
* Developed a C code for the PIC24F family controller that implements a cooperative and pre-emptive RTOS with support for semaphores, yielding and system timers.
* Built kernel functions like yield, sleep, wait and signal to switch processes and resources in real time.
Digital Communication System Designing
* A System-level design for a mobile satellite-based wireless user terminal using block phase estimation algorithm.
* A Simulation reference system was implemented for general packet data channel (GPDCH) subject to Rician flat using MATLAB.
MIMO (Multiple Inputs and Multiple Outputs) System Simulation
* Designed MIMO wireless systems and investigated the performance of spatial multiplexing with dual-polarized antennas and Rayleigh fading channel.
* Designed a 2X2, 4X4 and 1X4 transmit diversity scheme using Alamouti Space time block.
Remote Tester
* Gadget for testing of infrared (IR) based Remote Control Transmitters used for TVs, VCRs etc.
* Using transistors, capacitors, LEDs and buzzer, it senses infrared radiations transmitted with these devices and provides the efficiency rate.