Ankur Sharma
University of California, Los Angeles Cell: 310-***-****
Electrical Engineering E-mail: ***********@****.***
Information
Eng IV, 53-109
University of California, Los Angeles (September 2011 - present )
Education
MS, Electrical Engineering, GPA 3.62/4.00
Courses: Design of VLSI Circuits and Systems, Advanced Computer Ar-
chitecture, VLSI Design Automation (Ranked 2 nd ), VLSI Circuit Modeling,
Convex Optimization, VLSI Signal Processing, Special Topics in Circuits and
Embedded Systems
Indian Institute of Technology, Bombay (2006-2010 )
B.Tech., Electrical Engineering, GPA 8.95/10
Courses: Matrix Computations, Laboratory and Computational Techniques,
Advanced Network Analysis
C/C++, MATLAB, TCL, Perl, Python
Programming:
Skills
Calibre, Encounter, RTL Compiler, SPICE, OpenAccess
EDA Tools:
SoftJin Technologies, Bangalore, India (Aug 2010 - Aug 2011 )
Employment
As member of an IP developement group, conceptualized and implemented
an optimized polygon partitioning algorithm in C++. Partitioner im-
proved runtime by as nuch as 2X and was integrated within the tool chain.
Awarded Star of the Quarter award for the contribution.
CRL India, Pune, India (2009 Summer Internship )
Designed POSIX threads based parallel matrix-vector multiplication kernel
in C++ to optimize performance on multi-core machine.
Projects Maze Router Course Project Spring 2012
Developed a grid based maze router for standard cell M1 routing in C++
while satisfying width and spacing contraints.
Router featuring pin-aware grid placement, multi-criteria net ordering,
multipin routing strategies and multiple novel ripup-reroute algorithms,
was ranked #1.
Sensitivity Analysis of SOI based FINFet (Course Project Winter 2012 )
Studied the sensitivity of delay and power consumption in FINFet logic
family to gate width, supply voltage etc. 45nm PTM models for SOI
devices were simulated in HSPICE.
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Extracted a linear power and delay model based on the observed sensitivity
values and employed it for tuning a simple SOI based FINFet circuit
Pattern Dependent Correlation in Process Variations Course Project
Fall 2011
Studied the spatial similarity between layout patterns using the Open Ac-
cess library interfaced with C++, such that it correlates with the similarity
in their observed variations.
Based on empirical results, proposed a metric to quantify the similarity.
Variation-Aware Dynamic Power Management Course Project Fall 2011
Conceptualized self-adaptive power management methodology based on
periodic value iteration to dynamically compute the optimal power man-
agement policies as the power characteristics of the system change.
Carried out a simulation-based study in MATLAB of the proposed method-
ology. Compared the power savings against a static power policy.
Papers Towards Understanding Software Application Behaviour in Presence
of Permanent Hardware Faults (DATE 2013 ) link
Submitted
As part of MS thesis, under the guidance of Prof. Puneet Gupta, analyzed the
impact of permanent faults on applications. Applications with larger num-
ber of instructions sharing an operand, are more susceptible to permanent
faults. Proposed a simple code transformation to optimize the worst-case
fault count.
Adaptive Hardware Sorting (Embedded Systems Letter ) link
Proposed a design for hardware sorting unit comprising of quick sort and in-
sertion sort that outperforms a stand-alone quick sort on data sets of varying
sizes and pre-sortedness.
Awards and
Star of the Quarter award at SoftJin for the quarter May-July 2011
Recognitions
Graduate Student Researcher at UCLA, Sep2011 - present
All India Rank 90 (top 0.1%) in Joint Entrance Examination 2006 - a nation
wide examination.
Amongst top 30 students across the nation selected for training for Interna-
tional Chemistry Olympiad 2006.
Extra
Co-founder of P2P Stude Club at IIT Bombay. Club was established in
Curricular
2009 with the aim to foster regulated and healthy lifestyle practises amongst
Activities
students (especially, freshmen) for high e ciency and productivity.
Represented hostel in Inter-hostel Table Tennis tournament.
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