Design Electrical

LEE, YOUNG-JOON

Email: *****@******.***, Tel.: +1-404-***-****, Addr.: 3324 Peachtree Rd NE #2102, Atlanta, GA 30326 U.S.A.

Educational Background

Georgia Institute of Technology, Atlanta, Georgia, U.S.A.

Aug. 2007-Present Ph.D student, School of Electrical and Computer Engineering, GTCAD Lab.,

Advisor: Prof. Sung Kyu Lim, Major: Electrical and Computer Engineering, GPA: 3.5 / 4.0

Selected Courses: CAD for DFM, Physical Design Automation-VLSI, Microelectronics Technology,

Microelectronic System Packaging, Computability & Algorithms, Linear Optimization.

Expected graduation: May 2013.

Seoul National University, Seoul, Republic of Korea

Sept. 2005-Aug. 2007 M.S., Dept. of Electrical Engineering and Computer Science

Major: Multimedia Systems, Electrical Engineering, GPA: 3.85 / 4.3

Selected Courses: SoC Design Automation, Topics in Computer and VLSI, Computer Organization

and Design, Advanced Compilers, Speech Signal Processing, Stochastic and Random Process.

Mar. 1998-Feb. 2002 B.S., Dept. of Electrical Engineering

Major: Electrical Engineering, GPA: 3.7 / 4.3, Honor Graduate (Cum laude)

Research Interests

Monolithic 3D IC design automation, power-aware partitioning study of TSV-based 3D ICs, timing

optimizations for TSV-based 3D ICs, co-optimization of traditional metrics and reliability metrics on 3D

ICs.

Experience

GTCAD Lab., Georgia Institute of Technology, Atlanta, Georgia, U.S.A.

Aug. 2007-Present Ph.D Student

Conducted research on co -optimization of signal, power and thermal interconnect for 3D

ICs and timing optimization for 3D ICs. Performed 3D static timing analysis, timing

optimization, and 3D layout-versus-schematic for 3D IC projects (3D-MAPS), version 1

and 2. Currently studying on computer-aided-design for monolithic 3D ICs and power-

aware partitioning for TSV-based 3D ICs.

Cadence Design Systems, San Jose, California, U.S.A.

May 2011-Aug 2011 Summer Intern

Analyzed, debugged, and enhanced buffer insertion algorithms in post -route optimization

engine of the latest Cadence Encounter Digital Implementation System. Implemented a new

buffer-inverter transform.

Clipcomm, Inc., Seoul, Republic of Korea

Mar. 2003-July 2005 Assistant Research Engineer

Managed and customized Voice over IP (VoIP) endpoint application. Developed software

for Bluetooth access point adopted by Korea Telecom. Product sold over 20,000 units.

INFOEQ, Inc., Seoul, Republic of Korea

Mar. 2002-Feb. 2003 Research Engineer

Optimized embedded Linux kernel for video set-top box system. Developed a sound device

driver for National Semiconductor Geode chipset.

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Lee, Young-Joon (*****@******.***)

Publications

Young-Joon Lee, Patrick Morrow, and Sung Kyu Lim, Ultra High Density Logic Designs Using Transistor-Level

Monolithic 3D Integration, IEEE International Conference on Computer-Aided Design (ICCAD), 2012, to appear.

Young-Joon Lee, Inki Hong, and Sung Kyu Lim, Slew-Aware Buffer Insertion for Through-Silicon-Via-Based 3D

ICs, IEEE Custom Integrated Circuits Conference (CICC), 2012, pp. 1-8. Invited Paper.

Young-Joon Lee, Shreepad Panth, and Sung Kyu Lim, Enabling High Density Logic Designs for Monolithic 3D

ICs, SRC Techcon Conference, 2012.

Young-Joon Lee and Sung Kyu Lim, Fast Delay Estimation with Buffer Insertion for Through -Silicon-Via-Based

3D Interconnects, IEEE International Symposium on Quality Electronic Design (ISQED), 2012, pp. 228-235.

Dae Hyun Kim, Krit Athikulwongse, Michael B. Healy, Mohammad M. Hossain, Moongon Jung, Ilya Khorosh,

Gokul Kumar, Young-Joon Lee, Dean L. Lewis, Tzu-Wei Lin, Chang Liu, Shreepad Panth, Mohit Pathak, Minzhen

Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Gabriel H. Loh, Hsien -Hsin

S. Lee, and Sung Kyu Lim, 3D-MAPS: 3D Massively Parallel Processor with Stacked Memory, IEEE

International Solid-State Circuits Conference (ISSCC), 2012, pp. 188-190.

Young-Joon Lee and Sung Kyu Lim, Co-Optimization and Analysis of Signal, Power, and Thermal Interconnects

in 3D ICs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 30, No.

11, pp. 1635-1648, 2011.

Young-Joon Lee and Sung Kyu Lim, Timing Analysis and Optimization for 3D Stacked Multi -Core

Microprocessors, IEEE International 3D System Integration Conference (3DIC), 2010.

Mohit Pathak, Young-Joon Lee, Thomas Moon, and Sung Kyu Lim, Through Silicon Via Management during 3D

Physical Design: When to Add and How Many?, IEEE International Conference on Computer-Aided Design

(ICCAD), 2010, pp. 387-394.

Young-Joon Lee and Sung Kyu Lim, Timing Analysis and Optimization for Many-Tier 3D ICs, SRC Techcon

Conference, 2010.

Jae-Seok Yang, Krit Athikulwongse, Young-Joon Lee, Sung Kyu Lim, and David Z. Pan, TSV Stress Aware

Timing Analysis with Applications to 3D-IC Layout Optimization, ACM Design Automation Conference (DAC),

2010, pp. 803-806.

Young-Joon Lee, Mohit Pathak, Chang Liu, Moongon Jung, and Sung Kyu Lim, Design and Timing Optimization

of a 3D Stacked Microprocessor, ACM International Workshop on Timing Issues in the Specification and Synthesis

of Digital Systems (TAU), 2010.

Yoon Jo Kim, Yogendra K. Joshi, Andrei G. Fedorov, Young-Joon Lee, and Sung Kyu Lim, Thermal

Characterization of Interlayer Microfluidic Cooling of Three -Dimensional IC with Non-Uniform Heat Flux, ASME

Journal of Heat Transfer, vol. 132, no. 4, Apr. 2010.

Young-Joon Lee, Rohan Goel, and Sung Kyu Lim, Multi-functional Interconnect Co-optimization for Fast and

Reliable 3D Stacked ICs, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2009, pp.

645-651.

Young-Joon Lee, Michael Healy, Dae Hyun Kim, and Sung Kyu Lim, Efficient On-Chip Power, Clock, Thermal,

and Signal Delivery for 3D ICs, in Three Dimensional System Integration: IC Stacking Process and Design, edited

by Antonis Papanikolaou, Dimitrios Soudris and Riko Radojcic, Springer, 2009.

Young-Joon Lee, Michael Healy, and Sung Kyu Lim, Co-design of Reliable Signal and Power Interconnects in 3D

Stacked ICs, IEEE International Interconnect Technology Conference (IITC), 2009, pp. 56-58.

Young-Joon Lee and Sung Kyu Lim, Routing Optimization of Multi-modal Interconnects In 3D ICs, Electronic

Components and Technology Conference (ECTC), 2009, pp. 32-39.

Young-Joon Lee, Yoon Jo Kim, Gang Huang, Muhannad Bakir, Yogendra Joshi, Andrei Fedorov, and Sung Kyu

Lim, Co-Design of Signal, Power, and Thermal Distribution Networks for 3D ICs, Design, Automation & Test in

Europe Conference & Exhibition (DATE), 2009, pp. 610-615.

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Lee, Young-Joon (*****@******.***)

Yoon Jo Kim, Yogendra K. Joshi, Andrei G. Fedorov, Young-Joon Lee, and Sung Kyu Lim, Thermal

Characterization of Interlayer Microfluidic Cooling of Three -Dimensional IC with Non-Uniform Heat Flux, ASME

International Conference on Nanochannels, Microchannels and Minichannels (ICNMM), 2009

Young-Joon Lee and Sung Kyu Lim, Co-Optimization of Signal, Power, and Thermal Distribution Networks for

3D ICs, IEEE Symposium on Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2008,

pp. 163-166.

Hoseok Chang, Youngjoon Lee, and Wonyong Sung, Performance Optimization of a Multimedia Player on a

Mobile CPU Platform, IEEE Workshop on Signal Processing Systems (SIPS), 2007, pp. 163-168.

Kisun You, Youngjoon Lee, and Wonyong Sung, Mobile CPU Based Optimization of Fast Likelihood

Computation for Continuous Speech Recognition, IEEE International Conference on Acoustics, Speech and Signal

Processing (ICASSP), vol. 4, 2007, pp. 985-988.

Skills

Technical Expert Technical Expert of Information Processing, Human Resources Development Service of Korea.

Languages Fluent in both English and Korean.

Computer Languages: C/C++ with STL, Java, Perl, Tcl/Tk, Ruby.

Design Tools: Cadence Encounter and Virtuoso, Synopsys Design Compiler and PrimeTime,

Mentor Graphics Calibre DRC/LVS/PEX, ModelSim, MATLAB, Mathematica.

Honors and Awards

Aug. 2005-Feb. 2006 Scholarship from Seoul National University, Seoul, Republic of Korea.

Aug. 2006-Feb. 2007 Scholarship from Seoul National University, Seoul, Republic of Korea.

Feb. 2002 Honor Graduate of Seoul National University, Seoul, Republic of Korea.

Aug. 1998-Feb. 2002 Scholarship from Seoul National University, Seoul, Republic of Korea.

Activities

May 1998-Feb. 2002 Member of university hip-hop dance club - Hoofers in Seoul National University (HIS).

References available upon request.

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