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Senior PCB Designer

Location:
San Jose, CA, 95008
Posted:
February 14, 2013

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Resume:

Robert C. McCreight ***@*********.***

*** ******* ***** ****: 408-***-****

Campbell, CA 95008 Cell: 408-***-****

Senior PCB Designer

Objective

Seeking employment as a PCB Layout Engineer in a highly professional and

dynamic organization where I can utilize my designing abilities for mutual growth

and benefit. To work in an environment where I can learn and contribute to the

product development and company success.

Key Skills

- Design complex, multi-layer Printed Circuit Boards using Altium Designer and/or

Cadence Allegro. (Eager to learn other ECAD tools as required)

- Maintain CAD libraries and create new symbols and land patterns for both

schematic and PCBs as required for new designs.

- Generate complete documentation package including schematic, gerber files,

fabrication drawing, assembly drawing, ODB data, IPC netlist and pick-n-place file.

- Experience using AutoCad for the output of assembly and mechanical drawings.

- Schedule and conduct design review meetings with Engineering and other groups.

- Ability to meet deadlines and work in a fast paced high stress environment.

- Skilled at working with PCB fabricators and component suppliers.

- Understanding of Controlled Impedance, Differential Pairs and High-Speed design.

- Excellent communication, coordination, time management and leadership skills.

- Proficient with Microsoft Office tools like Excel, PowerPoint and Word.

- Can quickly grasp PLM programs and produce BOMs (Bill of Materials)

- Adept at Internet searches for research and problem solving.

EDUCATION

West Valley Community College (Architecture, Electronics, English, Math)

The Copper Connection, Inc. - PCB Design for High Speed Logic

The Copper Connection, Inc. - Layout Techniques for Digital PCBs

IPC Designers Council – IPC PWB Certification (C.I.D. since 2001)

PCB Design Conference West :

High Speed PCB and System Design – Lee Ritchey

Signal Integrity Issues in PCB Design – Doug Brooks

Cadence Allegro High-Speed Constraint Management v16.5 (Nov. 2012)

Cadence Allegro PCB Editor Intermediate Techniques v16.6 (Feb 2013)

PROFESSIONAL AFFILIATIONS

IPC Designers Council - Silicon Valley Chapter (President)

Altium Designer Silicon Valley Users Group

PCB West Top Gun Contestant (2008)

IEEE

PROFESSIONAL EXPERIENCE

eIQ Energy (San Jose, CA) 2009-2012

Senior PCB Designer

• PCB Layout using Altium Designer (Release 10)

• Support Engineering Team with Schematics and Bill of Materials generation.

• Maintain Symbol & Footprint Libraries, integrated with Access Database.

• Implemented and Administered Arena Solutions PLM system for BOM management.

• Reviewed and approved Engineering Change Orders with Document Control.

CADParts & Consulting (Santa Clara, CA) 2008-2009

Design Center Manager

• PCB Layout using Altium Designer (Winter 09) and Cadence Allegro (15.7-16.2)

• Office Administrator (Silicon Valley) for nation wide Design Service Bureau

• Project Manager for multiple designers and activities (layout, fab & assembly)

• Assignment to Palm for smart phone layout implementing advanced technologies

SMART Modular Technologies (Fremont, CA) 2005-2008

Senior PCB Designer

• Memory Module design utilizing Cadence Allegro (version 15.7)

• Flat Panel group PCB design support using Altium Designer 6.9

• Gerber checking and verification with CAM350 (v9.5)

• Member of Centralized Library Task Group (Footprint Librarian)

• Leader of Layout Design Task Group (capturing/documenting complete design process)

• Group Lead for PCB Layout (3 designers in Fremont and 2 designers in Irvine)

• Technical Liaison to PWB Fabrication Vendors (domestic and off-shore)

Dawn VME Products (Fremont, CA) 2003-2005

Senior PC Board Design

• Design of custom VME64X & cPCI Backplanes (Protel 99SE and DXP2004)

Cypress Semiconductor (San Jose, CA) 1989 – 2002

Design Engineering Group Lead (New Product Development) 2000 – 2002

• Organized company-wide use of Cadence PCB tools (Allegro and Concept HDL)

• Championed monthly PCB Design Council meeting for corporate wide collaborations

• Launched and maintained PCB Design Center intranet web site for engineering reference

Senior Layout Designer (Memory Products Division) 1995 – 2000

• Layout of a variety of PCBs for multiple internal customers using Protel99SE software

• Coordinated PCB Design Center activities from initial quote thru board delivery

• Interfaced directly with Cypress engineers and outside board fabrication vendors

Layout Designer (Multichip Technology, Inc.) 1989 – 1995

• Designed and documented Memory Modules using P-CAD software (4.6 thru 8.7)

PERSONAL TECHNICAL LIBRARY

Printed Circuits Handbook Fifth Edition by Clyde E Coombs, Jr. (CD version)

Right The First Time by Lee W. Ritchey (Volumes One and Two)

BGA Breakouts & Routing by Charles Pfeil

Printed Circuit Assembly Design by Leonard Marks/James A. Caterina

IPC-2221; IPC-2222; IPC-2223; IPC-2141; IPC-D-317A; IPC-D-325; IPC-T-50



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