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Engineer Project

Location:
Sahuarita, AZ, 85629
Posted:
March 09, 2010

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Resume:

ANDREAS GEORGIADES ***** S. Cmo Guadal, Sahuarita, AZ 85629

520-***-****

*****************@*******.***

SUMMARY

Multidisciplinary Yield Enhancement and Efficiency expert in the semiconductor industry. Recognized for several

million dollars in cost savings and awarded technical ladder distinction. Philosophy is “supply the customer with as

good or better a product than the one guaranteed by the product data sheet, while maximizing the efficiencies along

the manufacturing chain”. Skills recruited by multidisciplinary groups for help with maximizing operation

efficiency.

Became member of Technical Staff within two years.

Saved on average $10M per year in manufacturing costs.

Prevented major customer interruptions by applying rapid correlations and root cause analysis.

Proactively initiated controls for stabilizing and maximizing yields across the board.

Fluent in English and Greek; speaking, reading, writing and cultural nuances.

Naturalized U.S. citizen since 9/23/2008.

EXPERIENCE

2002 – 2009

Texas Instruments, Tucson, AZ

Sr. Product Engineer 2007 - 2009

Led multidisciplinary teams (Fab, Test, Quality, FA, etc.) in project management. Main focus was cost

reduction, yield and <1DPPM customer issues.

Improved and stabilized Yields across the manufacturing chain resulting in millions of cost savings.

Worked with numerous international customers (Toshiba, Sony, Bosch, RIM, Samsung, etc.) rapidly

resolving line down situations which resulted in considerable cost savings (millions of dollars).

Rapid correlation of root causes using dataPOWER and other software tools and implementation of

solutions by applying process fixes in Wafer Fab, Laser Probe or Final Test.

Initiating Yield Enhancement alerts when a device’s yield (in Fab, Laser Probe or Final Test) would fall.

Depending on the fallout, various levels of alert would be initiated. Reports and action plans were

presented and put in place.

Took part in various teams (SPC, MRB, six sigma, 5S, new product qualifications, quality alerts, etc.)

In charge of qualifying process transfers from Foundries to TI Fabs.

Training and mentoring other engineers/technicians/operators/managers in data analysis/ project

management using various tools and methods.

Yield Enhancement Engineer (Product Engineer Wafer Fab) 2002 - 2007

Cost reduction by identifying Fab, Laser Probe and Final Test inefficiencies and correcting them.

Responsible for Yield Enhancement of over 500 ICC and CIC devices from the Burr Brown High Precision

Analog product line.

Responsible for Laser Probe Sustaining Eng. of over 100 CIC and ICC devices.

Process, Laser Probe and Final Test Yield integration.

Troubleshooting of Process issues that affect yields, quality, reliability.

Conversion of Legacy devices to the Eagle Tester system .

Gain Technology Corporation, Tucson, AZ 1997 - 2002

Gain Technology was acquired by Standard Microsystems (SMSC) in June 2002

Product Characterization Engineer

Responsible for characterizing MAXIM analog ICs from the inception of the design to the final test for

production.

Responsible for communicating to the customers with any inquiries about the products and implementing

them into systems.

Failure Analysis at the wafer level of unsuccessful Si revisions and implementation of Focused Ion Beam

(FIB) solutions.

Responsible for manuscript, data sheet and ECN meetings for MAXIM Linear ICs.

Implementation of test solutions for MAXIM products.

Statistical Analysis of Characterization Data and normalization of parameter test data into the final test

limits for production.

Design, layout and production of high speed and DC Evaluation PCBs.

Internal Quality Auditor for ISO9001 procedures.

Active Laser Trim and debugging of circuit on die or wafer using an Optical Laser Probe Station.

Design and simulation of active resistor ladder trim networks on die.

Database maintenance for all archived layouts and tape outs.

AC and DC Characterization of MAXIM high speed analog ICs.

Schematic capture and design of PCBs at discrete component level, prototyping and debugging of boards

for characterization, test or customer evaluation.

University of Arizona, Tucson, AZ 1995 - 1996

Tutor/Grader, ECE Department (01/96 - 12/96)

Center for Electronic Packaging Research (05/95 - 01/96)

Software package design of effective inductance and current distribution calculation inside multiconductor

thin film packages.

Cyprus National Army, Cyprus 1991 - 1993

Army Second Lieutenant, Anti-Tank Platoon Commander, 213th Infantry Unit

EDUCATION

University of Arizona, Tucson, Arizona

Bachelor of Science, Electrical Engineering

August 1993 - May 1996 GPA 3.5/4.0

Graduated in 6 semesters

Cadet Officers Army Academy, Heraklion, Crete

Certificate of Army Officer

July 1991 - August 1993

Higher Technical Institute, Nicosia, Cyprus

Diploma of Technician Engineer, Electrical Engineering

September 1988 - July 1991

AWARDS RECEIVED

- Texas Instruments: Top 10% job performer.

- Became a Make Member Technical Staff within 2 years of joining TI.

Various “Extra mile” and “Thank you” awards.

-

University of Arizona: Dean’s List with Distinction - Fall 93, Fall 94.

-

- Center for International Students and Scholars Scholarship

- Department of Education of Cyprus Republic Scholarship 1993-1996

- Cyprus Telecommunications Authority Award for Excellence in Senior Project



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