Engineer Electrical

Harpreet

Sachdeva

**** **** ****** # **, ******** View CA, 94040 Email:

***********@*****.***, Cell: 408-***-****

Summary:

Master of Science in Electrical and Computer Engineering with

academic/industrial experience in Software Design/Test, Digital Design, and

Networking. Versatile and motivated, looking for a challenging position

with the opportunity to play a key role in the growth of the organization.

Technical Skills:

. Languages: C, Perl, SQL.

. Tools: XILINX, EldoSpice, MATLAB, Bugzilla, Quality Center, Eggplant,

POS, Radar.

. Database: Oracle.

. Technologies: CDMA, GSM, Wi-Fi, TCP/IP.

. Operating System: MS-Windows XP/Vista, Linux, MAC OS.

Educational Qualifications:

. Master of Science in Electrical & Computer Engineering

Dec 2009

San Diego State University, San Diego, CA

GPA - 3.22

. Bachelor of Technology in Electronics & Instrumentation

May 2006

U.P. Technical University, Uttar Pradesh, India

GPA- 3.60

Work Experience:

. QA Engineer

Apple Inc, Cupertino, CA

Feb 2009 - Present

o Analyze business Requirement documents, Functionality Specification

Documents and develop test cases accordingly.

o Execute test cases and validate various POS transactions, including

process & data flow, reports and interfaces to stores system.

o Execute test scenarios and verify the data feeds to third party

applications (payment engines and service providers).

o Check for validity of all the interfaces of the POS Application on

iTouch and MAC OS.

o Identify, document and communicate issues/defects discovered during

test case development and execution in Radar.

o Analyze logs to identify issues for the defects that are logged.

o Identify the test cases to be automated and use Eggplant to automate

them.

o Use UNIX shell scripts to monitor/execute the server side processes

and resolve day-to-day issues.

o Lead a team of 3 for an Expansion Project, working from the Business

Requirements till the completion of the testing cycle. In Process

coordinated with different teams (SAPR, GCRM, xCard, DS) for data

gathering and execution of their scripts. Conducted Daily Status

Meetings to discuss the bugs, issues and testing status of the

project.

Academic Projects:

. Master's Thesis & Research - "A QoS Aware Packet Scheduling Scheme for

WiMAX"

This thesis proposes a novel packet-scheduling scheme for providing

QoS to downlink traffic i.e. traffic transmission from the base

station (BS) to the subscriber stations (SS) in WiMAX. The primary

objective in designing the scheduling scheme is to provide each

traffic type with appropriate resources such that it meets its average

packet delay and average packet loss criteria. Implementation was done

in C and the Simulation results demonstrate that our scheduling scheme

minimizes packet loss and almost always meets average packet delay

constraint even in a heavily loaded network.

. Universal Asynchronous Receiver and Transmitter (Tools: XILINX)

Designed and implemented an 8-bit UART using XILINX, wherein the

Transmitter generates an 11 bit code with start bit, 8-bit data,

parity bit and stop bit and then transmits it asynchronously and the

receiver receives this code and then checks for parity & framing

error. After checking for errors, the code is compared to an LFSR

inside the receiver which has been synchronized with the LFSR of the

transmitter and stores this 8 bit data in a register.

. Coherently Detected BPSK System (Tools: MATLAB)

Simulated a coherently detected BPSK system using MATLAB and obtain

its PB vs. E/N0 characteristic experimentally and compared our result

with a graph of the Q (sqrt (2E/N0)) function.

. Flash A-D Converter (Tools: ELDO Spice)

Designed a 3 bit A-D converter and simulated it using EldoSpice, the

digitally encoded value of each voltage sample was outputted in the

form of a 3 bit code and latched into a register. This is done by

dividing the ADC Circuit into 3 sub system i.e. Sampling Sub System,

Comparator and Encoder.

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