Engineer Signal Processing

Aditya Kothari

**** ********** ***, *** # ***, LA, CA, 900**-***-*** 8577

******.*******@*****.*** Visa: H1-B

Education

.

M.S. Electrical Engineering

University of Southern California, Los Angeles, US Dec 2008

GPA: 3.8/4.0

B.Tech Electronics & Communication Engineering

Jaypee Institute of Information Technology, NOIDA, India May 2005

GPA: 9.7/10

Work Experience

.

UtopiaCompression Corp., Los Angeles, CA

Small Business Innovation Research Company

R&D Engineer Feb 2009 -

Present

Engineering Intern (Part Time) Jun 2008 - Dec

2008

> Signal Processing and DSP Systems

. Worked on image compression algorithms. Developed enhancement layer of

the scalable CODEC for texture enhancement in reconstructed images.

Designed data specific quantization and encoding schemes. Involved

with code development and memory optimization of CODEC software.

. Developed and ported video analytics algorithms on fixed point TI

DM642 DSP. Performed algorithmic and implementation optimization,

memory usage optimization, designed framework for real time input /

output of video, worked with video capture and display drivers

(DSP/BIOS), performed field tests and demonstrations.

> Wireless Ad Hoc Networking

. Part of the team developing routing protocol suite for airborne

network.

. Designed and simulated the routing protocol using QualNet Network

Simulator. Programmed memory efficient implementation of the protocol.

. Developed and analyzed protocols for seamless joining and departure of

airborne nodes, multicast routing, optimized flooding techniques,

asymmetric links.

. Worked on performance characterization of proprietory routing protocol

and compared with other wireless ad hoc network routing protocols

(OLSR, AODV). Simulated network imperfections and analyzed performance

of the protocol. Worked with Linux port of protocol (Quagga / Zebra

based implementation), real time network emulator and Linux based

network performance evaluation tools.

. Designed prototype gateway application using waveforms like Bluetooth,

ZigBee and WiFi.

. Gateway application supports real time voice transmission across

different domains and adapts to varying data rates.

. Developed multi threaded application, client-server framework. Worked

with COTS speech codecs G.711 and scalable G.729.1, Linux ALSA sound

libraries, BlueZ stack.

. Worked on Call Admission Control protocols for handling multiple

traffic flows in a highly mobile ad hoc network.

. Currently working on designing Multi Channel MAC layer protocol for

tactical ad hoc networks. Developing MATLAB based visualization and

analysis tool for ad hoc networks with different mobility models.

VirtualWire Technologies Pvt. Ltd., New Delhi, India

A Wireless Communication technology startup, incubated in Indian Institute

of Technology, Delhi, in 2003

DSP Systems Engineer May 2005 - June 2007

DSP Systems Intern Jan 2005 - May 2005

> Design of communications signal receiver and analysis tool.

. Worked with baseband HF Radio signals

. Involved with identifying algorithms by studying research literature

for - preprocessing and de-noising of signals, automatic modulation

recognition, baud rate computation, FSK demodulators, symbol timing

synchronization and bit pattern recognition, real-time display of

constellation diagrams, frequency & phase oscilloscopes.

. Simulated algorithms in MATLAB, performed testing with provided test

vectors and refined algorithms for improved performance, coded in C

and integrated modules with software framework.

> Baseband PHY layer communication & signal processing algorithms for First

Responder Radios.

. Develop baseband signal processing algorithms for CTCSS

Encoder/Decoder, CPFSK Modulator, and DTMF Encoder/Decoder. Algorithms

were developed in MATLAB, converted to fixed point arithmetic and

ported on TI TMS320C5510 DSP processors.

. Required optimized implementation of signal processing algorithms,

innovative methods to detect closely spaced frequency tones (CTCSS

tones) with limited number of signal samples and fixed point

arithmetic constraints.

> PCB design and Firmware development for DSP based conference card.

. Part of the team building custom embedded conference card. Worked

extensively with TMS320C5510 / TMS320C5502 DSP on chip & on board

peripherals.

. Worked on the circuit design for DSP / SLIC / AIC23 Codec portion.

. Developed McBSP, SPI and I2C based communication between DSP, AIC23

codec and SLIC.

. Developed double buffering software framework for the real time

system. Required to work with McBSP, DMA, Interrupts, associated Board

Support and Chip Support Libraries. Dealt with memory mapping, stack

and heap utilization and reentrant code issues. Worked with DSP/BIOS

(RTOS from Texas Instruments).

. Assembly level coding, optimization and porting of G.729A codec on

C55x DSP.

Department of Mathematics, University of Southern California

Lab Assistant, Math Computing Lab Aug 2007 - May 2008

Technical Skills

.

. Languages & Programming: C/C++, MATLAB, Assembly Language, Fixed Point

Arithmetic, Python & Shell scripting, Network programming, Multithread

programming.

. Tools: Code Composer Studio (TI), Visual DSP (Analog Devices), QualNet,

OrCAD, GDB, Visual Studio, MSP430 based microcontroller kits, XBee

Modules, BlueZ stack.

. Lab Skills: TI C5510, C6713, DM642 DSP kits, BeagleBoard, PCB schematic &

board layout, oscilloscopes, signal generators, multimeters, basic

circuit designs and soldering.

Publications

.

. "Performance Characterization of ad hoc routing protocols with mobility

awareness", A Kothari, B. Shen, A. Tiwari, A. Ganguli, S. Xu, D.

Krzysiak. (Under Review) MILCOM 2010.

. "Feasibility of Communication Planning in Airborne Networks using Mission

Information", A. Tiwari, A. Ganguli, A. Kothari, S. Avadhanam, J.

Yadegar, M. Compton, K. Hopkinson, MILCOM 2009, Boston, MA

. "Incremental Learning for Automatic Target Recognition", C. Raju, K.

Varadarajan, A. Kothari, H. Nguyen, J. Yadegar, J. Mills, SPIE 2009,

Orlando, FL

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