e-mail: ********@******.***
**** ********* **. • fort wayne, in 46804 • Phone 317-***-****
Matthew J. Schneider
objective
To pursue a career in engineering with a business that will take advantage of my talents while benefiting the
company by providing engineering solutions allowing for immediate and long-term company growth.
Work Experience
8/2009 – Present BAE Systems: Platform
Solutions Fort Wayne,
IN
Product Test Engineer
Troubleshoot military and commercial aircraft
FADEC (Full Authority Digital Engine Control)
flight controls down to the component level
Familiar with critical performance on demand (Class
3) electronics repair and handling procedures
Worked with groups of additional test and support
engineers to diagnose product related issues and
provide solutions in a timely manner
Provided support to operations to insure repair and
test procedures were executed properly
Experience using a logic analyzer to capture CPU
address, data, and control signals for troubleshooting
purposes
Familiar with using an emulator to take control of a
CPU core and step through software along with using
JTAG boundary-scan to verify node continuity and
proper hardware operability
Performed critical solder joint analysis using an
Ersascope, microscope and x-ray to verify J-STD
specifications are met and reduce the chance of
failure in the field
6/2006 – 7/2009 EITAC Solutions Group
(Purdue Research Park) West Lafayette, IN
Electrical Engineer
Worked 35-40hrs a week while attending graduate
school full time
Design and troubleshoot electrical schematics for
high end video magnifier products
Created electrical prototype designs as contract
services for external companies
Designed device for rapid forensic data
gathering and analysis used by law enforcement
and military personnel
Performed multiple stages of electronic product
design including creating schematic drawings, multi-
layer printed circuit board layout, SMT soldering and
circuit troubleshooting
Education
8/2003 - 5/2010 Purdue University West
Lafayette, IN
M.S., Electrical Computer Engineering Technology
(GPA: 3.49) (Expected 5/2010)
Master’s Thesis focusing on design for
Electromagnetic Compatibility
Performed maintenance on the Purdue University
anechoic chamber
Designed an automated antenna measurement
system to communicate with a vector network
analyzer and capture scattering parameter data
Designed analog, digital, and RF circuits which
purposely enhance radiated EMI, then implement
solutions in order to demonstrate why proper
circuit design is critical for electromagnetic
compatibility
Used EMI sensing probes and a spectrum analyzer
to detect unwanted radiated emissions from
circuits
B.S., Electrical Computer Engineering Technology
(GPA: 3.79)
Graduated with Distinction - Top 3% of class in
Purdue School of Technology
Emphasis on RF communications and
electromagnetism
Certifications and PROFESSIONAL ORGANIZATIONS
IEEE Member
Golden Key International Honour Society
Computer Technology Certifications Professional Organizations
CompTIA A+ Hardware and OS Certified
CompTIA Network+ Certified