Design Technical Support
Resume:
Hari Priya Vuppalapati
*****@***.***
Rolla, MO 654**-***-***-
6720
OBJECTIVE
To obtain a full-time position in the field of Computer Engineering
EDUCATION
Missouri University of Science and Technology, Rolla, MO
Dec 2010
Master of Science, Computer Engineering
VNR VJIET, Jawaharlal Nehru Technological University
July 2009
Bachelor of Engineering, Electronics and Communications Engineering
PROJECTS
StellarIP Solutions
Hyderabad, India
AHB and APB VIP Development June 2010
. Developed the OVC env for APB protocol with OVM compliance using SV
. Developed the individual agent components for MASTER and SLAVE agents.
. Developed Drivers, Coverage, Sequences and Test cases
Missouri S&T Rolla,
MO
Design of NCL based ALU
Fall 2009
. Designed and implemented a Null Conventional Logic based ALU starting
from its VHDL description through its Physical layout with TSMC 0.18
micron process technology using Mentor Graphics EDA tools.
. The process includes complete VHDL logic verification, layout floor
planning using IC station tool and finally the power and delay analysis
is done using ELDO tools. DRC analysis was performed on the design.
Missouri S&T Rolla, MO
BIST (Built In Self-Test) Fall
2009
. Designed and simulated BIST Circuitry in Verilog to test SRAM using
March Y algorithm
. Created SRAM modules to simulate 'Stuck at Errors'
. Developed test bench and verified the design
Missouri S&T Rolla, MO
RAM based FIFO unit
Spring 2009
. RAM based FIFO unit: Implemented a FIFO control unit and RAM module using
Verilog and VHDL. The design was synthesized and emulated on Altera DE-2
FPGA board and was optimized for delay and area factors
Missouri S&T Rolla, MO
Object Oriented Analysis and Design
Spring 2010
. Designed a temperature controller and Coffee Maker as part of the course
work.
. The project included hardware and software interface, use case diagrams,
sequence diagrams, class diagrams and C++ implementation.
Missouri S&T Rolla, MO
Design of UART (Universal Asynchronous Receiver and
Transmitter Spring 2009
. Involves designing the transmitter portion of the 8-bit UART.
. UART is designed in Verilog and simulated using Modelsim, then the code
is synthesized to generate hardware design using Leonardo spectrum.
EXPERIENCE
Missouri S&T
Rolla, MO
Graduate Research Assistant August
2009 - Present
. Developed a library for the NCL primitive gates using Design
architect to draw the schematic, layout floor planning using IC
station tool. Power and delay analysis is done using ELDO tools. The
DRC, LVS and PEX analyses are successfully performed on the design.
. Worked on Quartus II extensively to estimate power dissipated in the
design by varying the switching activity in the circuit. Worked with
various files such as .bdf, .vwf, .blif, .saf.
Missouri S&T
Rolla, MO
Graduate Teaching Assistant August
2009 - Present
. Currently teaching and assisting undergraduate students in the
following labs
. Digital Circuits - Design and Simulation of Digital Logic
Circuits using Mentor Graphics EDA tools and testing digital
hardware using reconfigurable FPGAs
. Electronic Circuit Lab - Laboratory tools and measurement
techniques for basic electronic circuits
. Prepared and graded several quizzes and assignments
DELL International Services
Rolla, MO
Technical Support Associate
Sep 2008 - Dec 2008
. Worked with Dell Desktops, Laptops & Printers as a Technical Support
Associate
. Provided first-level technical support on basic operational or
maintenance of personal computers and /or peripherals using available
tools. Guided customer troubleshooting efforts to identify products that
have Customer Issues and issue service calls in accordance with guidelines
Missouri S&T Rolla, MO
IT Help Desk January
2009 - May 2009
. Supported a variety of computing tools, specialized learning labs and
technology-related resources to assist with academic and administrative
work
TECHNICAL SKILLS
Simulators : Model Sim, Cadence NC-Sim,
Accusim, Eldo
Tools Used : NC-Verilog, IV Builder, Design
Architect, IC-Station,
Leonardo Spectrum, PSpice, Altera DE2 FPGA Board: Cyclone II
HDLs :
SystemVerilog, Verilog, VHDL
Protocols : AHB. APB
Programming Languages : C, C++, Java, Perl, C#.NET, ASP.NET,
ADO.NET, VB, SQL Server
Microsoft Office Package : Word, Excel, PowerPoint,
Outlook, Visio
Operating Systems : Windows, Linux
HONORS AND ACTIVITIES
Missouri S&T - India Association
Missouri S&T - International Student Club
VNR VJIET, JNTU - ECA (Electronics and Communication Association) -
Executive Committee Member
VNR VJIET, JNTU - IEEE student Chapter - Executive Committee Member
VNR VJIET, JNTU - Organizer of the annual technical festival
"Convergence" and "Vector"
PERSONAL
Interests include travelling, cooking, gardening and glass painting
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