Sowmini Rajendran
Cell: 662-***-****
*********@*****.***
Summary
Expert in the design and testing of passive and active RF circuits
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Expertise in developing digital signal processing algorithms
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Extensive experience in DSP firmware development
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Experience in Model Based Design (MBD) for signal processing algorithms in
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power amplifier linearization
Adept in the use of various RF testing instruments like spectrum analyzer and
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signal generator
Highly creative with excellent analytical, mathematical and communication skills
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Work Experience
C DAC, India (Staff Scientist) May ‘06 – May ‘10
Centre for Development of Advanced Computing (CDAC) is the premier R&D center under
the Dept. of Information Technology, Govt. of India and it has been identified as the
resource centre for technology development of wireless and broadband communication,
power electronics, cyber forensics, language technologies and intelligent transportation
systems.
• Designed, implemented and tested RF circuits for low pass filters, band pass filters
and low noise amplifiers in VHF/UHF range.
Gathered requirements, identified components and engaged in the design of a
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receiver for a portable/manpack Software Defined Radio (SDR) in the VHF/UHF
range.
Evaluated the spurious performance of a Direct Digital Synthesizer (DDS) for
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effective frequency planning in frequency hopping for a SDR.
Worked extensively with RF instruments including spectrum analyzer, signal
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generator, power meter and network analyzer.
Developed and tested device drivers and signal processing algorithms on a TI DSP
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platform for Cartesian Loop Linearization (CLL) in a TErrestrial Trunked RAdio
(TETRA) base station.
Tested and implemented Digital Predistortion (DPD) algorithm on Xilinx FPGA for
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linearizing a Multi Carrier Power Amplifier (MCPA).
Tested and implemented a Crest Factor Reduction (CFR) algorithm for a MCPA to
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be used in TETRA Base Station.
Designed and developed Graphical User Interfaces (GUIs) using LabVIEW for
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testing signal processing algorithms.
Optimized DSP codes for various signal processing algorithms used in baseband
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embedded software for TETRA.
Documented test cases and test reports for baseband embedded software for
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TETRA.
Trained and guided graduate interns in projects related to DPD algorithm
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development.
Infosys Technologies, India (Software Engineer) Nov ‘05 – May ‘06
Infosys Technologies is a global leader in the "next generation" of IT and consulting and is
headquartered in Bangalore, India.
• Underwent Software training in ASP.NET
• Developed C executable routines in Visual Studio
• Familiarized with MySQL RDBMS
Skill sets
Design Tools: LabVIEW, MATLAB, Simulink, Xilinx ISE, Xilinx System Generator,
Microwave Office, Code Composer Studio, Visual Studio
Test Instruments: Network Analyzer, Oscilloscope, Spectrum Analyzer, Signal Generator
Programming Languages: C, VHDL
Education
Bachelor of Technology (Electronics and Communication Engineering)
Jun 2005, University of Kerala, India
Certificate course in ‘Fundamentals and Recent Advances in RF and Microwave
Communication’
Indian Institute of Technology (IIT), Kharagpur, India