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Engineer Design

Location:
San Jose, CA, 95138
Posted:
August 22, 2010

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Resume:

Dien .T. Duong

****

Silver Pond Lane

San Jos ,

CA 95138

Phone: H:408-***-**** ; C:(408) 429-

4778

Email:

******@*****.***

SUMMARY: Analog Product engineer with over 10 years of experience seeking a

full time position as a product engineer in the semiconductor industry.

Expertise in semiconductor device characterization and qualification

process for products such as:

. PLL based clock generator and buffers, VCXO, crystal oscillator, clock

multipliers and dividers.

. Voltage regulators, linear regulators, buck and boost switching

regulators, LDO (low dropout) regulators.

. A/D and D/A converters

. Memory and digital logic devices.

. Op-amps and voltage comparators

CAREER SUMMARY:

04/06 - 03/09 Integrated Device Technology, Inc, San Jos , California

Product Engineer

. Perform device characterization and qualification of over 30

semiconductor IC products per year to sustain a $100M /year for

the Business Unit.

. Implement yield enhancement to improve yield and maximizing

profits.

. Analyzed customer returned devices, verified failure mode and

determined root causes to implement design fixes and workaround

that enable customer's satisfaction in a timely fashion.

. Performed application measurement such as: signal

integrity, PLL Spread Spectrum, Slew rate, Jitter, Long Data

record, phase noise on devices for consumer electronics such

as: PS3, Digital TV, printers, video display.

11/99 - 04/06 Integrated Circuit Systems, Inc, San Jos , California

Product Engineer

. Performed full and partial characterization on ICS clock chips

including DC and AC characterization.

. Support reliability performance test of ICS clock chips.

. Design characterization board schematics and work with layout

designers to implement high performance boards with signal

integrity.

. Perform ESD and latch-up test for different type of packaged

semiconductor devices.

. Measured data versus Specifications in different

characteristics of micro-clock chips (Jitter, Skew, Spread,

Phase Noise, 7thHarmonic)

08/94 - 10/99 Supertex, Inc, Sunnyvale, California

Associate Engineer

. Supported design group on first silicon out functionality check

and debug.

. Assist tape-out works. In charge of the lab operation which

includes lab supplies, equipment calibration.

. Building prototype boards, micro-probing.

07/91 - 04/94 Raytheon Semi conductors, Mountain View, California

Engineering Technician

. Built prototype boards and data taking.

. Design engineering support in debugging and functionality

check.

EDUCATION:

San Jos State University, San Jos , California

Bachelor of Science in Applied Physics

Cabrillo College, Santa Cruz, California

Associate of Science in Computer Electronic Technology

Control Data Institute Certificate

Additional Skills:

.Software: Microsoft Word, Excel, power point, LABVIEW, MATHLAB, GPIB

interface, OrCAD, Adobe Acrobat, Frame maker.

Bench test Equipment Hardware: Agilent, Le Croy, Tektronix oscilloscopes,

Network Analyzer, Spectrum Analyzers, Logic Analyzers, Function/Pulse

Generator, Time interval analyzer, Areoflex phase noise systems,

Temperature controllers, micro-probing,

.Protocol: I2C, SPI, DDR, RS-232/485 interfaces,IEEE-1284 Standards, USB,

GPIB

.Switching Levels: LVCMOS, HVCMOS, LVPECL, LVDS, SSTL, HSTL, IGBT, HCSL



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