Engineer Design

Senthil S Velmurugan, Email: ******@*****.***, Phone: 408-***-****

RESUME

A focused, analytical, pro-active and resourceful professional, a team

player with 20+ years of strong hands-on technical experience and

progressive responsibilities. A fast learner and can acquire technical

depth in short time.

In the earlier part of career, 10+years of experience by performing

various positions in a startup like vertically growing Design &

Manufacturing company working on

. Carrier class Embedded systems for modernization of Indian Telephone

mechanical switches.

. Nation wide Small and Medium business (SMB) public call office

products, IVRS systems.

. Ethernet Networking products for Export to US & UK catalog vendors.

In US for 10yrs experience in Advanced & Leading Edge technology Graphic

and Server system companies and experience in Engineering/Design

Services(EDS) Company (Functioned as JDM for start-ups).

As a design engineer, I have Proven track record of working in multiple

projects from concept to proto type & volume manufacturing, worked with

multi-location teams, multi-disciplinary members, and gained good

negotiation skills with vendors leading to successful product release and

life cycle management thereafter. I am methodical, well organized with

attention to detail while finding solutions. Leave no stone unturned to

complete the objectives.

Strong interpersonal skills and adaptability, contributing to the success

of Cross Functional Teams. Good experience in getting things done in a

matrix type organization, including multiple Culture/Regions/Time Zones.

Experience with establishing and executing a plan of continuous cost

reduction, sustaining hardware designs while maintaining high yield and

performance in high volume products. Ability to perform in a past paced

dynamic start-up type environment. Can work independently and manage

multiple priorities within a team and can meet demands of multiple projects

at different phases. Can perform independently all design and test engineer

functions.

Hands on Core Skills

1. Schematic Capture and Constraint driven Layout, Processes & Tools.

2. High Speed Signal Integrity and Power Integrity flow design

3. High power density/ Low voltage multi-phase VRM (POL/DC-DC Converter/

SMPS) design

4. Very high speed processor, memory bus Interfaces(6.4GT/S FSB and 10G

IO bus)

5. Design for DFT/DFM, 4 corner Test, EMI/EMC considerations.

6. Analog - Mixed signal boards and CPLD/FPGA Logic implementation.

7. First time Silicon and ASIC bring-up, New Hardware architecture system

bring-up.

8. Excellent Hardware, Firmware, Software debug and validation skills

using various high speed Test tools. Good hands on Rework skills.

9. Documentation for Design, Layout, Manufacturing, and Management.

10. Product/Project life cycle management and sustaining support.

11. Mechanical, Thermal, Cooling, Power and Packaging aspects rack based,

desk based and hand-held.

12. Excellent back ground in SMT Assembly, Manufacturing processes,

Mechanical Product Engineering.

Educational Qualifications

4 year Bachelor of Engineering in Electronics and Communication

(B.E)

3 year Engineering Diploma in Electronics and Communication

(DECE)

Self study/CEU Courses

* High-Speed PCB and System Design Course - Lee Ritchey, UC Berkeley

Extension.

* Wireless RF Systems & VLSI Engineering Online short courses - Stanford

University

* Development of New Products (QRPD) - University of California Extension,

Santa Cruz.

EMPLOYMENT & EXPERIENCE

a) SuperMicro Computer Inc California, USA 2008 Jan

to Aug 2010 2.75yrs

Sr Hardware Design Engineer - Member of a team of 4 for 4way-Itanium II

server with RAS feature..

Knowledge of Server system architecture for multiple CPUs and IOHs with

manageability functions. Responsible for design of Redundant I/O modules

for 4U server with Reliability, Availability and Serviceability(RAS)

features using dual Boxboro-MC chipset and quad CPUs. Interfaces are Intel

QPI front side bus for 4.6/6.4GT/s, PCI Express Gen 2, High speed Scalable

Memory Interface(SMI) for Milbrook memory controller, DDR3 DIMM interface.

Multi layer PCBs 20+ with mid plane with back drilling, Special focus on

defining signals and CPLD functions, I2C topology, IPMI based system

management (BMC) controller signal definition, interface mechanisms to

support hot add/remove, online and offline of CPU, IO, memory modules. Work

with Intel simulation team for SI aspects of QPI bus. System level testing

and interaction with Insyde BIOS vendor & Intel PDG(customer). Test

BIOS on windows and linux server OS. Worked with chassis team for cooling,

optimize fan speed as per readings from CPU and on board thermal registers.

Test SAS addon card with 8 drives. Work with Asian ODM for NPI and supply

of 300 units to Intel Platform Design Group.

Test and Debug of complex I2C bus topology for BMC control to manage and

effect RAS features. Power supply and memory bus signal design

verifications. Knowledge of Asset tool for QPI bus validation/margin

analysis. Supplied 300+ servers for Intel customers for SW development.

Evaluation of design options for 170W TDP Itanium core power switcher.

Knowledge of x86 single and multiple CPU mother boards with CPU such as

Xeon, Nehalem, Atom processors, x48 chipsets.

Design of Mezzanine daughter cards with Infiniband -40G and Ethernet 10G

interfaces. Responsible for schematic capture, onboard power suppliers and

sequence, vendor interaction, layout constraints, proper placement and

routing, power plane and layer split. Performance testing and tuning using

test software with Qlogic vendor.

Routing topology study and layout guide for 8way Westmere/Boxboro-EX CPU

server system board. Knowledge of SATA/SAS storage back plane design.

b) GDA Technologies Inc(L&T infotech), California, USA 2006 June

to 2007 Dec 1.5yrs

Sr.Member Tech Staff- Member of a large project for Boeing- 6months

Member of Dual Freescale PowerPC processor board for Smith Aerospace.

Designed DC-DC converters for CPU, FPGA, memory and other modules, FPGA

power Analysis using vendor tool, Constraint management, and Supervision of

complete board layout with vendor using Mentor DxDesigner. Presentation on

power section design during Boeing/Smith Preliminary Design Review.

Knowledge of stringent design process and acceptance standard DO160.

Knowledge of FPGA with DDR2 interface, bus arbiter.

Engineering Manager - Lead a team of 7 for Product/System Design Services.-

12months

Leading project based team of Engineers located in US and India. Solution

architect for many products and proposals. Responsible for customer

interface, design review and timely deliverables for product design such as

PoEthernet Security Camera, *Smart-Cellphone Reference Platforms, *MP3

Player, *Controller board for Camera with GSM/GPRS module, *Compact

(portable) AMD Media PC with 7.1 digital audio, *Handheld(Portable)

Rugged PC with GPS module, Dual Camera, WiFi, Touchpanel, and Bluetooth.

*10GbEthernet ATCA Blade/Server. Interface with vendors like EMS/CM,

Industrial Design, Product design house - performed schedule tracking,

issues management, contract management between customer and vendors.

Acting Manager for CDMS- Proto design & Turn-key project RFQs. Team of 5

for back end operation (3months additional responsibility).

Leading Technicians for Proto test and Bring up. Work with US and Asian

Contract Manufacturers for proto assembly, quotation, processes issue,

escalation. Review/Improvement of NPI documents and processes. Help debug

prototypes and RMA for board products. Supported testing hw using Open

source linux BSPs.

Performed survey and understanding of components for RF signal chain,

Baseband & App processor for design of Smart phone, Industrial Panel

PC, Medical Tablet PC in response to RFP/Qs from start up customers.

Experienced as a CDM/ JDM for many US companies, so exposed to processes

and issues thereof with Asian Contract Manufacturers.

c) NVIDIA Corporation, California, USA.

2001 July to 2006 May 5 yrs

System Design Engineer- III - Lead Design Engineer(LDE) for Graphics

Processors ASIC-GPU

Design of high end Add on cards for desktop and workstation involving

Silicon bringup/Validation, Reference Designs, High Volume add on cards for

Tier 1 OEMs such as DELL, Apple. Responsible for Power supply design,

schematic capture, placement guidance, sch and pcb routing constraints,

peer reviews. Work closely with SI/PI simulation engineer for signal

quality, termination aspects, power delivery impedance, decoupling

optimization. Work with EMI/EMC team and tackle emission issues, Thermal

and Reliability Team, NPI Team, Power component vendors. Work with chip

design team on critical issues on IO buffer/timing aspects, Extensive,

Hands on Design and verification testing. Compensation adjustments,

efficiency improvements for Power supplies up to 6 phases. Work on issues

with DDR2/3 memory signal validation, AGP, PCI, PCI Express interfaces,

Display interface DVI/HDMI/VGA validation. Design of high density buck

regulators for GPU(100W) and memory, FCBGA package ball-out definition and

routing studies for new chips with spread sheet to SCH library automation.

Exposure to PCI Express Gen 2 Intel validation test board design and test.

Knowledge of HDCP. Worked on add on card with TV Tuner and FM receiver

modules.

LDE of many GPU product releases under very tight schedules. As an LDE

responsible for MRD pounding with marketing, creation of Product Design

Specification, supporting issues with teams responsible for BIOS, Driver,

WHQL, display interface DVI/VGA qualification, 4 corner PVT tests,

FCC/Shock-n-Vibe approvals, NPI to Asian CMs & OEMs for bulk manufacturing.

Perform life cycle support for BOM & ECO using Agile system. Help Failure

Analysis and Sustaining team to root cause the IC/Assembly failures. Worked

on first dual GPU dual card designs with SLi bus, work closely with Signal

integrity, chip design teams for test and debug. Worked on many first time

130, 95nm GPUs and DDR2 bus. Review designs of OEM customers and suggest

better alternatives.

Gained good knowledge of high power ASIC design flow, FCBGA substrate

design aspects, power delivery routings & packaging issues. Knowledge of

multimedia card with TV tuner/Video capture.

Worked with Customers, Sales and Marketing on MRD/SDS/PDS review and

architectural trade-off and contributed to decision making processes.

Holder of a patent in power monitor inside chips. Member of many patent

invention suggestions.

d) FORCE Computers India Pvt Ltd, Bangalore, India 2000 April

to 2001 July 1+yr

Sr Design Engineer - Embedded/Custom application Motherboards

Personally designed, debugged, performed all DVT functions and hand over of

x86 -Pentium III Single Board Computer with Server works chipset Add-on

Card for Storage Area Network Controller. DDR, PCI, IDE, VGA interfaces.

Acceptance test involved testing with array of HDDs in a Environmental

chambers. Helped a new Engineer to form Signal Integrity process in India

using Innoveda XTK tool.

Exposure to Memory DIMM design when working with parent company at SMART,

Fremont.

Design Manager - Embedded Intel Motherboards

Lead 3 engineers in design of Intel x86 Plumas chipset based Reference

Mother board for Intel with PCIX interfaces, AGTL+ Front side bus, PCI66,

AGP and 100Mbps LAN interfaces. Responsible for VRM design, design document

accuracy and deliverables, work with Intel team on Orange book aspects.

Experienced as a offshore design team for US OEM.

e1) Analog and Digital Systems (ADS), Bangalore, India 1993 Sep

to 2000 Mar 6+yrs

R&D Engineer - 4yrs- Telecom and Networking Products.

Designed hardware, real time firmware using assembly and C and mechanical

aspects, Bring up Test and Debug, Field trial and transfer to production.

Products are using 8/16 bit processors and controllers with various

discrete peripheral chips, Analog circuit and digital interface for Telecom

line monitoring. Products designed are Personal Telephone Assistant,

Interactive Voice Response systems, 300bps, 1200bps modem, 56K Rockwell

modem, Pulse to Tone converter with voice bridge using fuzzy logic. Good

knowledge of SLIC, DAA analog circuits. Associated with design of three

carrier class products from concept to acceptance/deployment. Associated

with design revisions for a long running high volume POS type product with

battery back up

.

Exposed to mixed signal design for Line cards using codecs, opamps, ADC,

Analog Front Ends and couplers. Solution architect for many products and

proposals for desk top and semi portable applications.

10/100Mbs Ethernet add on cards, Various media Transceivers (wire & fiber),

8/16/24port Hubs and switches with ASICs, x86 processor based Management

module for Switches. Knowledge of router designs. Help develop management

software. Acquired knowledge and experience as an OEM/ODM partner to US/UK

customers.

Written C application for Fax transmission, remote Flash memory update over

modem. Gained Very good skill in debugging hardware and software for real

time embedded systems. Written assembly and C language applications for

above products. Designed and timing verified PCI arbiter using Abel HDL and

Xilinx CPLD for Ethernet switch.

Good experience in Indian Telecom Carrier product quality control

(TEC,CACT,QA/QC), document control, compliance, design type approval

process. Design responsibility includes CE/UL/FCC/EMI/EMC compliance,

testing and debugging, NPI and production transfers. Telco/Network product

validation included environmental test.

Project Leader-1yr, Group Manager-1yr

A team of 7 engineers, 2 layout engineers, and 5 technicians. Providing

guidance to engineers. Project involved many sustaining activities,

retargeting existing products for different applications. Mentored and

guided many fresh engineers. Good experience in multi-taking and detail

oriented design reviews, tackle bring up, and debug issues.

Implementing a design flow for system design that encompasses all design

stages from requirements review and board specifications through production

testing and deployment. I2C addon card with long cable. Bulk Call

Simulators with Call quality monitoring for telecom carrier, EPABX in PC

ISA Add-on card.

e2) Analog and Digital Systems (ADS), Bangalore India. 1988 Sep -

1993 Sep 5 yrs

Production Manager - Microprocessor & PC based systems for 2 year

Implemented the first SMT assembly line, Augmentation of in-house machine

shop for production of enclosures for export market, Managed 8 engineers,

15 assembly technicians, 5 mechanical technicians, procurement in charge.

Training in Charge & Mentor for Induction of 20 Engineers for

Production/NPI and Customer support positions. Gained good knowledge of

Assembly issues, mechanical issue while card/system debug.

Managed NPI and production of 1000+ Electronic Telegraph systems and 100+

Concentrators in record time of 2 month with QA approval from Government

of India. Implementing a state-of-the-art process for hardware validation

and production testing for export market devices. Developed Test program

routines and test Jigs to speed up the product testing.

Implemented many productivity & yield improvement techniques. Trained many

new engineers for in-house and field skills. Managed process and procured

capital goods for metal shop floor section.

Production/Service Engineer, Supervisor for 3 years

Managed 48V DC based IBM PC system qualification and integration. Dot-

matrix printer service. Production Testing and Field installation and

service of Public Call Office monitors, Tele line monitors

Worked as a NPI engineer for many products to transition from R&D to

Production, Field Trial, feedback and improvements.

FAMILIAR ELECTRONIC DEVICES / MODULES / INTERFACES/TOOLS

CAD Tools: OrCad, Viewlogic, Cadence -Concept schematic and Allegro, PADS

PCB Layout, Mentor DX Designer, Component Information System (CIS) and

Library creation interface to Agile. Valor DFx Tool.

High Speed Tools: Candence Spectraquest Power Integrity simulation, IBIS

models, Topology Editor, Constraint Manager. Spice circuit simulations, and

Knowledge of Hyperlynx tool, Matlab capabilities.

HDL: Abel HDL(VHDL), Altera Design Tool, Xilinx Design tool flow for

CPLD/FPGA, Can learn Verilog.

SW: Assemblers and C Compilers, IDE for 8051, C language, DOS, Windows and

Linux Environment,

Processors/Interface: Many 8/16bit processors and controllers, Pentium 3 to

Xeon/Itanium processors, AMD Sempron/Athlon CPU, Nvidia GPUs up to 100W,

Freescale iMX27/31 Media controllers, Freescale PowerQUICC, AMCC Power PC

440SPe SOCs, Altera/Xilinx FPGA/CPLDs, Custom ASICs.

Architectures: IBM PC, SOC systems, ATCA 10G Network Blade. Study

knowledge of Smart Cell phone architecture, Analog RF, Digital RF, Base-

band, power management and other chips.

Bus: Intel FSB up to QPI 6.4GT/s, Infinibad 40G, Hyper Transport, QPI,

SDRAM & DDR2/3-1033, DIMM, MII, GMII, XAUI, SFP, IBM ISA, AGP4x, PCI66,

PCIX-133, PCI-Express (PCIe), SDIO, IDE, SATA/SAS, SPI. TTL, CMOS, LVDS,

AGTL, SSTL logic signaling.

Networking: Ethernet from 10Mbs to 10GigE, ATCA chassis, Infiniband, I2C,

IEEE1349 fire-wire, Wireless WiFi Module, GSM/GPRS ModuleS, GPS Module,

Blue tooth Module, IR Module, Fiber transceivers, Knowledge of TCP/IP,

SNMP, VoIP, Zigbee.

I/O: RS232, USB, DVI, TMDS, HDCP, BT656, VGA, TV tuners, TV out, S-Video,

Video capture, SLIC(Voice, modem), Flat panel Displays, CRT Monitors, PCM,

Voice Codecs & Framers. Ethernet, Power over Ethernet, LVDS interface,

Fiber optic transceivers and modules., SPDIF, HD Audio Processing,

Biometric sensors, CCD/CMOS Image sensor,

Agency Approvals: FCC, CE, UL, Shock and Vibe, Govt,. of India - Dept of

Telecom Quality Assurance,

Automation: Knowledge of Virtual Instruments, GPIB bus for data capture.

Communication Tools: All Microsoft office suite tools for documentation and

project tracking.

ERP: Agile BOM management for ERP and Design purposes.

Test Equipments: Design/Interface validation using High End/High Bandwidth

DSOs. Use of Logic Analyzer, Spectrum Analyzer, TV Standard Testers,

Ethernet Packet/Traffic Analyzers, Transient load simulators, In-Circuit

Emulators, TAP/ JTAG chain debug port emulators, Jitter Measurement, In

circuit testers in manufacturing.

Software: Experienced in real-time assembly programming for 8051, Z80,

8085, 8086 based systems for telecom applications. Used Embedded C and

Microsoft C and coding for T.30 fax transmission application, T4-

Manchester encoding of ASCII text, and Remote bios update using modem.

Knowledge of issues in Customization of Open GL Linux code for Embedded

systems bring up, Boot loader customization. Worked with PC BIOS and

Drivers team for board bring up issues. Knowledge of Video codec functions

and analytics.

Power: LDO, Linear Regulators, high power Buck Regulators, Multi rail hot

swapping, Hot-plug, AC adapters, Backlighting.

MANUFACTURING

Manufacturing Equipments: Managed with Semi-Automatic SMT pick and place,

Reflow ovens, Optical and X-Ray Inspection systems, SMD Rework stations,

Wave soldering Equipments, In Circuit Test Stations, Flying probe tester,

Environmental Chambers, EMI/EMC Test Infrastructures. ESD Control.

Sheet Metal: Worked with Different Tools and implements, Power Press,

Sheet metal cutter/benders, Dies for Molding and Metal forming. Powder

Coating, Aluminum racks, Chassis, and Facia Panels.

Industrial Design: Worked with ID Engineers for plastic, metal and semi-

rugged enclosure designs, material selection. Knowledge of Rapid

prototyping, SLA models, Mechanical CAD/CAM systems, Creative design team

interaction.

MISC

Work Permit: US Permanent Resident/Green Card holder.

City of Residence: Sunnyvale, CA

5

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