Design Software

Allen Timothy Jones

***@********.***

818-***-**** (cell) / 818-***-**** (home)

**** ********* ***. **********, **. 91311

Work Experience

Andrews Space, Avionics Division (Valencia, California) - 05/2010 to

11/2010.

Contract Employee. Duties consisted of RTL (Register Transfer Level) design

in VHDL for Xilinx FPGAs and CPLDs.

> FPGA implementation of a CMG (Control Moment Gyroscope) control

system for satellite attitude determination and control. Design was

implemented in a Xilinx Virtex 4, and contained an integrated

Microblaze processor. Software in the processor controlled logic in

the FPGA to drive the motors, and the position was read using a

resolver to digital converter with approximately 12 bits of accuracy.

> Other activities included board testing/verification, code review,

derating analysis and simple GUI implementation in Visual Basic.

Taiyo Yuden, Wireless Technology Department (Takasaki, Japan) - 11/2007 to

12/2009.

Duties consisted of RTL design in VHDL for Xilinx FPGAs and CPLDs. Work was

centered on control circuits for prototype wireless systems, and

demonstration systems for antennas and wireless modules. Projects included:

> Analyzed undocumented C code and implemented it in hardware using

VHDL. The original software used Posix threads for a communication

interface which allowed data transfer between system software and a

communication device. It also handled and generated protocol related

messages. I also wrote a software interface between the functions in

the header file and the hardware implementation.

> Developed VHDL code to implement a best-fit exponential function for

the input to a phase shifter. Integrated the code into an existing

design, and verified the behavior experimentally.

> Constructed a custom bit-error rate tester for a transmitter/receiver

pair using the Xilinx GBPS (gigabit/second) RocketIO transceiver. I

also designed an FPGA module which provided a flexible interface to a

PLL.

> Used the Xilinx Embedded Development Kit to add a custom serial

communication logic module to a PowerPC bus in a Spartain3 FPGA and

wrote a driver interface in C to integrate it.

Fullcast Technology (Tokyo, Japan) - 11/2006 to 11/2007. Contracting

agency.

> Preparation for contract positions in engineering including intensive

Japanese study combined with training in RTL design using Verilog on

Xilinx FPGAs.

> Main projects included decoding and displaying streaming video from a

camera, and decoding and displaying MPEG1 encoded video files from

memory.

Education

. University of California, Santa Cruz - Fall 2001 to Spring 2006

o Bachelor of Science in Computer Engineering.

o Senior project won the School of Engineering's Annual Senior Design

Project Contest

o Education focused on digital hardware design

. RTL design in Verilog on Xilinx and Altera FPGAs

. PCB design using OrCAD, including high speed design techniques

. Microcontroller based system design using Motorola 68HC11, 68HC12, and

TI MSP430 utilizing both assembler and C.

o Secondary focuses included analog design and PSpice circuit analysis,

as well as software algorithms in Java and C.

. Study Abroad - Tohoku University, Japan. Fall 2003 - Spring 2004

o Intensive Japanese and RTL design in Verilog on a Xilinx FPGA.

Tools

FPGA Development tools - Xilinx ISE, Xilinx Embedded Development Kit

Hardware simulation software - Mentor Graphics ModelSim

Software analysis program - SciTools Understand

Software development - Xilinx SDK, Microsoft Visual Basic

Miscellaneous tools - various logic analyzers, oscilloscopes, and spectrum

analyzers, Microsoft Office, various text editors

Primary Languages

VHDL, Verilog, C

Proficient in Japanese, including formal/business Japanese, with several

years of work experience in Japan.

References

References available on request.

Contact this candidate