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Engineer Design

Location:
Vista, CA, 92084
Posted:
November 16, 2010

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Resume:

* **** *. ******

**** **** ***** ***** . *****, California 92084

760-***-**** . ******.****@**********.***

ASIC Design Engineer . Hardware Design Engineer . PCB Electronics Engineer

PROFILE

Highly accomplished, results-driven hardware design engineer with special

expertise in ASIC and PCB design. Background includes all design aspects,

from product inception through realization. Experienced at architecture

design, creation of functional design specifications, logic design, and

schematic capture. Adept at using Verilog RTL and FPGA tools. Able to

prepare and conduct verification and code testing, develop DFT logic, and

conduct simulations.

Areas of Expertise

ASIC Design . Hardware Engineering . PCB Design . Electronics Engineering .

RTL Coding . Quality

Product Development . Logic Design . Bench & Code Testing . Design

Verification . Architecting

PROFESSIONAL EXPERIENCE

ASTUTE NETWORKS, San Diego, California . 2001-2010

Senior Staff Hardware & ASIC Design Engineer

One of first design engineers for VC-funded startup ASIC chip design

company. Performed ASIC and hardware design engineering. Worked in

conjunction with software, verification, PCB layout, and physical design

engineers. Oversaw design life cycles for multiple product areas. Provided

support for synthesis design flow and carried out script modification.

Accomplishments:

Designed protocol cluster unit for company's first ASIC chip: high-

performing parallel processing chip used for network packet, protocol, and

interface processing, plus network storage. Architected design with 10

processors and DMA engines for multiple memories. Validated new silicon

Ethernet interface and supported synthesis design flow.

Successfully designed Ethernet unit for second ASIC chip. Updated protocol

cluster design. Researched and designed Ethernet MAC unit with multiple

interfaces. Identified IP suppliers.

Carried out design of 10Gb Ethernet switch and networks storage processor

for Storage Blade board. Validated design in lab.

Evaluated Altera's Stratix IV FPGA for future products. Migrated unit from

Astute's ASIC chip to Altera's FPGA. Presented design flow results to

design team.

Created switching regulators (power supplies), hot swap controllers, PCI

Express to PCI-X bridge, and 10Gb Ethernet switches for RTM and

complimentary boards. Performed switch verification. Delivered presentation

on findings.

FAIRCHILD (MIXED SIGNAL DIVISION), Carlsbad, California . 1998-2001

Senior Staff Design Engineer

Carried out digital design for mixed signal ASIC chip design division.

Worked closely with application, product, and test engineers. Authored RTL

code for synthesis and verification phases. Oversaw high-speed mixed signal

design.

Accomplishments:

Delivered low power mixed signal design for external fan controller that

measured internal and external temperatures. Led verification testing.

As Technical Lead, architected key aspects of DVI video receiver.

KIRK T. LARSON . Page 2 . ******.****@**********.***

ADDITIONAL EXPERIENCE

ROCKWELL (Network Access Division), San Diego, California . 1994-1998

Senior Staff Design Engineer

Technical lead on team that delivered first silicon design success for

Octal T1/E1 and DSL voice pairgain framers. Coordinated design architecture

and feature implementation. Managed verification testing and synthesis

script development.

BROOKTREE CORPORATION, San Diego, California . 1990-1994

Test Engineer

Designed JTAG controller for T1/E1 physical line interface and video

decoder. Implemented internal and boundary scans. Generated scans and

functional vectors.

CAREER NOTES: Previously held Test Engineer positions with TRW LSI

PRODUCTS and HONEYWELL SSED (details available on request).

EDUCATION

Bachelor of Science in Electrical Engineering, Michigan Technological

University, Houghton, MI

Associate of Science / Associate of Arts, Grand Rapids Junior College,

Grand Rapids, MI

TECHNICAL SKILLS

MS Office, Verilog, TCL, Perl, RTL coding, Synopsis DC Compiler, Cadence

ORCAD Capture, Allegro, Finisar XGIG Analyzer, Spirent Smartbits, Tektronix

6GHZ 4 Channel Digital Oscilloscope, Macraigor JTAG Commander, Altera

Quartus II, TimeQuest Timing Analyzer, and more



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