Project Design Engineer

Albert (Xianglin) Meng **** E Tyson St, Gilbert, AZ 85295

480-***-**** ab0ijq@r.postjobfree.com

Education

Master of Technology in Electronic Systems Engineering Technology

Arizona State University Polytechnic, Mesa, Arizona Graduation date: December 2012

Cumulative Grade Point Average: 3.9/4.0

Bachelor of Engineering in Electronic Science and Technology

Shanghai Jiao Tong University, Shanghai, China Graduation date: July 2011

Cumulative Grade Point Average: 3.3/4.0

Skills

Design, build and test digital and analog circuits. Routine user of Microsoft Word, Excel, PowerPoint,

Circuit behavior and simulation with standard Visio, Minitab, Multisim, and LabView.

software. Languages: Fluent in English, native in Mandarin

Software programming: C++/C, JAVA, MATLAB. Chinese and technical communication in Japanese.

Hardware programming: Verilog, System C, VHDL

Internship Experience

ASIC Design Engineer in Chip and System Research Centre in Shanghai Jiao Tong University

March 2010 to July 2011

Worked in team in a commercial ASIC design project.

Coded the block-matching module in the design with Verilog.

Implemented the PSNR estimation module with C.

Interacted with representatives from Fullhan Corporation weekly.

Research & Project Experience

Master ’s Graduation Project (under the supervision of Dr. John Robertson)

Studied the signal distortion caused by human-electrode-interface in electrophysiological measurements.

Extracted RC values of the interface impedance of different interfaces and compared the results.

Bachelor ’s Graduation Project (under the supervision of Dr. Wenjiang Liu)

Worked as team leader in designing architecture of multi-core ASICs specified for scalable video processing.

Implemented co-processor design for quality-scalability processing based on H.264 AVC and MPEG-4 algorithm.

Circuit Design Project

Built a DC-DC converter transfers unstable high input voltage to stable low voltage output with PWM control.

Mathematical Modeling Projects

Modeled different retailer strategies in a 3-level supplier-retailer-consumer environment with Markov chain and

differential equations analogous to food-chain model in MATLAB.

Modeled malfunction possibility of a multi-element computer network with self- repair mechanism in MATLAB.

Course work

C++ programming Digital electronic technology

Introduction to VLSI design Analog electronic technology

Digital system simulation and design System on Silicon

Layer deposition technology Statistical process control

Dopant control technology

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