| Resume alert | Resumes 1 - 2 of 2 |
High School Engineering
Kakinada, AP, India
... Education: Education College Year of Percentage n ame/University p assing Studying M.Tech Kakinada institute of 2014 79.5 I I year in VLSI- engineering and technology SD ( KIET), (JNTUK). B.Tech in V s lakshmi engineering 2012 67.3 electronics and ... - 2014 Jun 09
... Education: Education College Year of Percentage n ame/University p assing Studying M.Tech Kakinada institute of 2014 79.5 I I year in VLSI- engineering and technology SD ( KIET), (JNTUK). B.Tech in V s lakshmi engineering 2012 67.3 electronics and ... - 2014 Jun 09
Design Project
kakinada, AP, 533002, India
... knowledge in verification methodologies Experience in using industry standard EDA tools for the front-end design and verification VLSI Domain Skills HDLs: Verilog and VHDL HVL: SystemVerilog Verification Methodologies: Coverage Driven Verification ... - 2012 Aug 16
... knowledge in verification methodologies Experience in using industry standard EDA tools for the front-end design and verification VLSI Domain Skills HDLs: Verilog and VHDL HVL: SystemVerilog Verification Methodologies: Coverage Driven Verification ... - 2012 Aug 16