| Resume alert | Resumes 31 - 40 of 2719 |
Electrical Engineer Renewable Energy
Chennai, Tamil Nadu, India
... Line Parameters, Short Circuit Analysis LabVIEW- Battery Modelling with hardware with NI Device EDA-Proteus-Used to build Schematics, PCB Model CAD files PROGRAMMING LANGUAGES Embedded C Java Python Verilog Hardware Description Language (VHDL). ... - 2022 Jan 16
... Line Parameters, Short Circuit Analysis LabVIEW- Battery Modelling with hardware with NI Device EDA-Proteus-Used to build Schematics, PCB Model CAD files PROGRAMMING LANGUAGES Embedded C Java Python Verilog Hardware Description Language (VHDL). ... - 2022 Jan 16
Power Plant Intern
Haldwani, Uttarakhand, India
... Samsung R&D, Bangalore in RTL Integration team since September,2021 • Basic MATLAB - Simulink • System Verilog and Basics of VLSI • LINUX • RTL Integration • Basic understanding of computer language Python and C Implant Training at: • UPCL in 2019. ... - 2022 Jan 16
... Samsung R&D, Bangalore in RTL Integration team since September,2021 • Basic MATLAB - Simulink • System Verilog and Basics of VLSI • LINUX • RTL Integration • Basic understanding of computer language Python and C Implant Training at: • UPCL in 2019. ... - 2022 Jan 16
Ece Telugu
Hyderabad, Telangana, India
... Done certification in Verilog conducted by Maven Silicon. Workshops Attended: Attended a workshop on Verilog Conducted by Maven Silicon. Attended a workshop on Python Conducted by APSSDC at St.Ann’s College of Engineering and Technology. Strengths: ... - 2022 Jan 13
... Done certification in Verilog conducted by Maven Silicon. Workshops Attended: Attended a workshop on Verilog Conducted by Maven Silicon. Attended a workshop on Python Conducted by APSSDC at St.Ann’s College of Engineering and Technology. Strengths: ... - 2022 Jan 13
Solar Ece
Rasipuram, Tamil Nadu, India
... Basic knowledge in Digital design, Verilog coding and Low power VLSI techniques. Basic knowledge in Cadence Encounter Tool. Comprehensive knowledge of Physical Design implementation, Physical Design strategies-Sanity checks, Floor Planning, Power ... - 2021 Dec 12
... Basic knowledge in Digital design, Verilog coding and Low power VLSI techniques. Basic knowledge in Cadence Encounter Tool. Comprehensive knowledge of Physical Design implementation, Physical Design strategies-Sanity checks, Floor Planning, Power ... - 2021 Dec 12
Software engineer
Hyderabad, Telangana, India
... As Ex-Data Analyst in Globaledx Technologies from Jul2016-Sept2016 ACADEMIC PROJETCS EVM TRIPLE DATA ENCRYPTION STANDARD USING VERILOG/VHDL SECURITY FROM SINGLE TO MULTI CLOUD USING JAVA Skill set Interpersonal skills and Java PERSONAL ATTRIBUTES ... - 2021 Dec 10
... As Ex-Data Analyst in Globaledx Technologies from Jul2016-Sept2016 ACADEMIC PROJETCS EVM TRIPLE DATA ENCRYPTION STANDARD USING VERILOG/VHDL SECURITY FROM SINGLE TO MULTI CLOUD USING JAVA Skill set Interpersonal skills and Java PERSONAL ATTRIBUTES ... - 2021 Dec 10
Mini Project Engg
Pune, Maharashtra, India
... TECHNICAL SKILLS: DESIGNING SOFTWARES KNWOLEDGE: NI Multisim Xilinx & Proteus PROGRAMING SOFTWARE KNOWLEDGE: C LANGUAGE, DATA STRUCTURE, MATLAB, FPGA, NI LABVIEW, Assembly Language: 8051, Embedded C, Python, VHDL, Verilog. PROJECTS: Designed ... - 2021 Dec 07
... TECHNICAL SKILLS: DESIGNING SOFTWARES KNWOLEDGE: NI Multisim Xilinx & Proteus PROGRAMING SOFTWARE KNOWLEDGE: C LANGUAGE, DATA STRUCTURE, MATLAB, FPGA, NI LABVIEW, Assembly Language: 8051, Embedded C, Python, VHDL, Verilog. PROJECTS: Designed ... - 2021 Dec 07
Inplant Training Youth Leader
Coimbatore, Tamil Nadu, India
... The Verilog language code is used to create adders and Multipliers. The Main Application of The project is Low power and High speed performance. AREA OF INTEREST: Digital Electronics Computer Networks. TOOLS KNOWN: ModelSim Labview SOFTWARE ... - 2021 Dec 07
... The Verilog language code is used to create adders and Multipliers. The Main Application of The project is Low power and High speed performance. AREA OF INTEREST: Digital Electronics Computer Networks. TOOLS KNOWN: ModelSim Labview SOFTWARE ... - 2021 Dec 07
Inplant Php
Chandigarh, Chandigarh capital, India
... One day International Workshop with hands on training program on “BLOCKCHAIN TECHNOLOGY” conducted by SAP from 19-09-2019 Five days Inplant program with hands on training on “VLSI Design & It’s Programming Using Verilog HDL” held by Caliber Embedded ... - 2021 Dec 02
... One day International Workshop with hands on training program on “BLOCKCHAIN TECHNOLOGY” conducted by SAP from 19-09-2019 Five days Inplant program with hands on training on “VLSI Design & It’s Programming Using Verilog HDL” held by Caliber Embedded ... - 2021 Dec 02
Entry Operator Network Engineer
Vasanth Nagar, Karnataka, India
... Management 2012-2016 Academic Project Project Title : Low- power & area efficient shift register using pulsed latches Language : Verilog VHDL, Operating System : Windows 7 DESCRIPTION: This project was done to help the students at the College level. ... - 2021 Nov 23
... Management 2012-2016 Academic Project Project Title : Low- power & area efficient shift register using pulsed latches Language : Verilog VHDL, Operating System : Windows 7 DESCRIPTION: This project was done to help the students at the College level. ... - 2021 Nov 23
Systems Ltd Electronics Engineer
Noida, Uttar Pradesh, India
... Embedded, PIC and x51 processors, FPGA, VHDL, Verilog, SystemC Software Engg. Data Acquisition System, ADC, DAC, Digital and Analog Circuit Design and Sensors Electro-Optical, Imaging, Laser and LED Lighting. Through understanding of industrial ... - 2021 Oct 25
... Embedded, PIC and x51 processors, FPGA, VHDL, Verilog, SystemC Software Engg. Data Acquisition System, ADC, DAC, Digital and Analog Circuit Design and Sensors Electro-Optical, Imaging, Laser and LED Lighting. Through understanding of industrial ... - 2021 Oct 25