| Resume alert | Resumes 51 - 60 of 243 |
Tron associate
Hyderabad, Telangana, India
... Technical Qualification VERILOG System VERILOG Basics of C Language Ms. Office (word, excel,powerpoint) Academic Projects Study Project on System 902B, Carried out at ODF, From: Project 2018 on Traffic May to Light July Controller using VLSI This ... - 2020 Aug 29
... Technical Qualification VERILOG System VERILOG Basics of C Language Ms. Office (word, excel,powerpoint) Academic Projects Study Project on System 902B, Carried out at ODF, From: Project 2018 on Traffic May to Light July Controller using VLSI This ... - 2020 Aug 29
Power Plant Civil Engineering
Hyderabad, Telangana, India
... Languages: C,Verilog HDL, 8051&8086 Assembly Language. Technical: Xilinx, MATLAB, KEIL. Academic Projects: An Efficient Pilot Design Scheme for Sparse Channel Estimation in OFDM systems(Oct 2015 –June 2016) Description: This project deals with the ... - 2020 Aug 27
... Languages: C,Verilog HDL, 8051&8086 Assembly Language. Technical: Xilinx, MATLAB, KEIL. Academic Projects: An Efficient Pilot Design Scheme for Sparse Channel Estimation in OFDM systems(Oct 2015 –June 2016) Description: This project deals with the ... - 2020 Aug 27
Engineering Power
Hyderabad, Telangana, India
... 2007 65 Technical Knowledge: Softwares : MATLAB, : VHDL, : Verilog, : Lab View. Publication: International Journal of Review In Electronics & Communication Engineering 4 Tap Wavelet Filters using Algebraic Intergers. ABSTRACT: This paper proposes a ... - 2020 Aug 26
... 2007 65 Technical Knowledge: Softwares : MATLAB, : VHDL, : Verilog, : Lab View. Publication: International Journal of Review In Electronics & Communication Engineering 4 Tap Wavelet Filters using Algebraic Intergers. ABSTRACT: This paper proposes a ... - 2020 Aug 26
Engineering Public School
Hyderabad, Telangana, India
... Duration: 6 Months Html Java C programming Verilog HDL System Verilog Python based image processing Worked on Data Wavelet Transmission method of transmission of images and video signals using matlab tool, in the year 2016. Worked on sign magnitude ... - 2020 Aug 25
... Duration: 6 Months Html Java C programming Verilog HDL System Verilog Python based image processing Worked on Data Wavelet Transmission method of transmission of images and video signals using matlab tool, in the year 2016. Worked on sign magnitude ... - 2020 Aug 25
Engineer Engineering
Hyderabad, Telangana, India
... Embedded C in 8051Micro controller and ARM family, Keil uVision4&5, Proteus Design Suit, XILINX, Debugging, Verilog, VHDL, Simulation, RTL, Synthesis. Skills : Instruments problems solving and troubleshooting skills. Excellent critical thinking ... - 2020 Aug 22
... Embedded C in 8051Micro controller and ARM family, Keil uVision4&5, Proteus Design Suit, XILINX, Debugging, Verilog, VHDL, Simulation, RTL, Synthesis. Skills : Instruments problems solving and troubleshooting skills. Excellent critical thinking ... - 2020 Aug 22
Electronics engineering Fundamentals, simultion tools,C, java, sql
Hyderabad, Telangana, India
... Core Java Best Innovative Award on sensor guided robotics by Roboversity Skifi Labs Internship & Training Details: RTTC BSNL Hyderabad— Basic Inplant Training ECIL Hyderabad — Verilog Language (HDL language) Workshops: Seven days workshop on sensor ... - 2020 Aug 20
... Core Java Best Innovative Award on sensor guided robotics by Roboversity Skifi Labs Internship & Training Details: RTTC BSNL Hyderabad— Basic Inplant Training ECIL Hyderabad — Verilog Language (HDL language) Workshops: Seven days workshop on sensor ... - 2020 Aug 20
Project Security
Hyderabad, Telangana, India
... Microsoft office Matlab Verilog HDL TRAITS Enthusiast Leadership Writing Skills Fast Learner Teamwork Adaptability Diligent ACTIVITIES Completed an One month Internship on VLSI at ECIL (Electronic corporation of India limited) during my second year. ... - 2020 Aug 19
... Microsoft office Matlab Verilog HDL TRAITS Enthusiast Leadership Writing Skills Fast Learner Teamwork Adaptability Diligent ACTIVITIES Completed an One month Internship on VLSI at ECIL (Electronic corporation of India limited) during my second year. ... - 2020 Aug 19
Engineering Security
Hyderabad, Telangana, India
... SKILLS & ABILITIES: ● C programming ● Digital Design ● Verilog coding EDUCATION: COURSE COLLEGE YEAR CGPA B.Tech in Electronics & Communications MVGR College of Engineering (Autonomous) 2017-2021 9.23 Intermediate Narayana Junior College, BOI Andhra ... - 2020 Aug 12
... SKILLS & ABILITIES: ● C programming ● Digital Design ● Verilog coding EDUCATION: COURSE COLLEGE YEAR CGPA B.Tech in Electronics & Communications MVGR College of Engineering (Autonomous) 2017-2021 9.23 Intermediate Narayana Junior College, BOI Andhra ... - 2020 Aug 12
Office Engineering
Hyderabad, Telangana, India
... 2.Title of the Project: Design And Analysis Of Viterbi Algorithm For Turbo Decoder Using Verilog Description: The designed decoder retrieves the transferred information from the encoded data by correcting up to two error bits in the bit stream. ... - 2020 Aug 10
... 2.Title of the Project: Design And Analysis Of Viterbi Algorithm For Turbo Decoder Using Verilog Description: The designed decoder retrieves the transferred information from the encoded data by correcting up to two error bits in the bit stream. ... - 2020 Aug 10
Engineer Power
Hyderabad, Telangana, India
... Basic knowledge on writing the code in VHDL, Verilog. By using Automated Tools-Graphical user interface to collect frequency accuracy, raw data, Amplitude data and phase data. Basic knowledge of Labview coding and embedded coding. PREVIOUS EMPLOYER ... - 2020 Aug 08
... Basic knowledge on writing the code in VHDL, Verilog. By using Automated Tools-Graphical user interface to collect frequency accuracy, raw data, Amplitude data and phase data. Basic knowledge of Labview coding and embedded coding. PREVIOUS EMPLOYER ... - 2020 Aug 08