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Distance: Job alert Jobs 261 - 270 of 1165

FPGA UVM Design Engineer

ViaSat  –  Marlborough, MA, 01752
... and debugging constrained random and directed test cases * Debugging failing tests, understanding both the UVM testbench and VHDL/Verilog source code, working closely with the RTL developers * Collecting and reporting code and functional coverage * ... - Jul 25

Lead Firmware Engineer

STR  –  Arlington, VA
... Experience with FPGA and SoC design entry using Verilog or VHDL Experience with design flow for Xilinx and/or Intel FPGAs Experience with simulation tools such as ModelSim/Questa, VCS, or Incisive Demonstrated desire to successfully pursue new ... - Jul 14

UVM Digital Verification Engineer

Draper  –  Boston, MA, 02298
... functional coverage closures to achieve 100% Perform code reviews and to mentor junior engineers in the group Fluent in System Verilog including SVA Recent experience with UVM/UVMF Familiarity with at least one major industry simulator (Questasim, ... - Aug 01

Senior Chip Design Verification Engineer

NVIDIA  –  Bnei Brak, Tel Aviv District, Israel
... Deep knowledge in HDL (Verilog/VHDL) Familiarity with the different verification tools and methodologies. High-Level English Ways to stand out from the crowd: Validated experience in ASIC Verification. Knowledge in Specman. Knowledge in SimVision ... - Jul 07

Senior Design Engineer - Digital & PMIC

Cypress HCM  –  Suwanee, GA
... running various RTL tools to identify and fix potential issues Designing/writing microarchitecture and RTL coding using System Verilog Implementing fine-grain power gating for critical paths in the module to reduce leakage Planning and coordinating ... - Aug 03

Staff Analog Design Engineer

Elevate Semiconductor  –  San Diego, CA
... Programming: Verilog, Verilog-A, C/C++, Python. Strong leadership and talent management abilities. Excellent communicator; collaborative across engineering, manufacturing, and applications. Adept at managing complexity in design, projects, and org ... - Aug 02

Silicon Engineer, Digital Design, Quantum AI

Google  –  Mountain View, CA
$156,000-$229,000 +
... Preferred qualifications: 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience building digital control and signal processing chains for mixed-signal sensing or ... - Jul 28

Functional Verification Application Engineering Support

Mainz Brady Group  –  Wilsonville, OR, 97070
... in ASIC/FPGA RTL design using VHDL, Verilog, or SystemVerilog Proficiency with C/C++ and Object-Oriented Programming in a verification context Hands-on knowledge of UVM, constrained-random testing, and simulation tools BS in EE/CE required; ... - Jul 14

System Modeling & AMS Design Engineer

Advanced Micro Devices , Inc.  –  Rollingwood, TX, 78716
... of analog/mixed signal design concepts and CMOS processes Knowledge of basic analog blocks: Linear and Switching voltage regulators, DAC, ADC, comparators, oscillators Experience with simulation tools such as Spectre, Hspice, AFS, System Verilog. ... - Jul 31

ASIC Design Verification Engineer - New College Grad

NVIDIA  –  Austin, TX
... Experience in System Verilog, UVM and in general OOPS based programming. Strong coding skills in Python or other industry-standard scripting languages. Strong understanding of RTL design (Verilog). Good understanding of computer architecture ... - Jul 26
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