| Distance: | Job alert | Jobs 211 - 220 of 1692 |
Hardware System Engineer with Security Clearance
SI Tec Consulting LLC
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Maryland City, MD, 20701
... Key Responsibilities: Design, develop, and simulate FPGA-based hardware solutions Develop HDL code in VHDL or Verilog Utilize ModelSim for simulation and debugging Work with Xilinx tools (Vivado, ISE) for implementation and testing Collaborate with ... - Jul 31
Sr. Design Engineer (FPGA)
Moog
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Phoenix, AZ, 85003
... Develop HDL code and testbenches using VHDL or Verilog. Perform design analysis to ensure compliance with system requirements and best practices. Conduct conceptual design development and trade studies. Collaborate with cross-functional engineering ... - Jul 20
Design Verification Engineer- GPU Diagnostics
Advanced Micro Devices , Inc.
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Rollingwood, TX, 78716
... Daily work involves code development and debug in C++ in DV environment, running and debugging simulations for hardware developed in Verilog, waveform analysis using Verdi and running emulation on FPGA platforms. You have an important role in ... - Aug 04
Hardware Engineer with Security Clearance
Markesman Group
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Clarksville, MD, 21029
... * Have experience with Verilog, System Verilog, or VHDL. * Have experience with industry-standard EDA tools and processes (synthesis, P&R, simulation, etc.)? * Have the ability to learn new skills quickly Preferred Requirements • ? ?Have experience ... - Jul 31
Advanced Electrical Engineer, Power with Security Clearance
The Computer Merchant, Ltd.
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Manassas, VA, 20108
... * Strong documentation and communication skills * OrCAD Capture experience a plus * Experience with firmware or microcontrollers a plus * Experience with VHDL/Verilog a plus Workplace Options: This position is Hybrid/Flex. While on-site, you will be ... - Jul 31
Verification Engineer
Tekfortune Inc
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Jersey City, NJ
... The ideal candidate must have hands-on experience with System Verilog and UVM, and a solid understanding of the complete verification life cycle. The role requires expertise in SOC Integration and SOC verification, along with protocol experience in ... - Jul 28
Design Verification Engineer (eInfochips Inc)
Arrow ECS
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Marlborough, MA, 01752
... Design Verification Engineer Location: Sunnyvale CA (Hybrid 3 days onsite) Experience: 8+ Years Job Description: What candidate will Be Doing: At-least 8+ years of experience in System Verilog HVL and C++/C At-least 8+ year of experience in UVM. ... - Jul 31
PLL/Clocking Design Engineer
Apple
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Aloha, OR, 97078
... + Simulation and Modeling: Skilled in developing System Verilog models, and performing behavioral simulations to explore new architectural performance and impact on loop dynamics. Ability to design/debug RTL is a plus. + Attention to Detail: ... - Jul 07
Senior Verification engineer
TWO95 International
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Sunnyvale, CA, 94087
Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog Requirement:. • 5+ or more years of proven experience on ASIC / SoC / IP Verification. • Strong ... - Aug 04
DV Engineer
Mastech Digital
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San Jose, CA
80USD - 100USD per hour
... - Knowledge in UVM, System Verilog/Verilog. - Prefer background in domains like CPU, GPU or other similar ASIC experiences. - Expect the ability to code. Education: Bachelor’s degree in computer science, Electrical/Electronic Engineering, ... - Aug 05