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Analog/Mixed Signal Verilog Modeling Design Engineer
Broadcom Corporation
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San Jose, CA, 95111
... * Understand Verilog-AMS modeling language * Good knowledge of SystemVerilog UDT/UDR nettype (using Cadence wreal or EEnet package) * Familiar with analog circuits such as LDOs, TIAs, analog muxing, SARADC sample-and-hold (S/H), comparators, DAC ... - Jan 14
Staff ASIC Design Engineer
Parade Technologies Ltd
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Beaverton, OR, 97075
... verification practices * Ability to write RTL based on a specification and simulate vectors to verify RTL * Experience using System Verilog (SV) and at least two prior RTL designs * Extensive knowledge of PCIe, USB3, or Power Delivery Experience: * ... - Jan 09
ASIC Design Engineer Intern
Ambarella
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Manhattan, NY, 10017
... Job Description Position Responsibilities: * Designing and implementing video compression logic, image processing logic, vector processing and neural network accelerator logics, and processor cores, in Verilog and System Verilog. * Logic design, ... - Jan 09
ASIC Design Engineer
Parade Technologies Ltd
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Beaverton, OR, 97075
Responsibilities: * Member of design team for large SOCs Qualifications: * BS/MS degree and 0-5 years of work experience * Good understanding of digital design and verification practices from course work or job experience * Ability to write Verilog ... - Jan 10
Sr. FPGA Engineer (Contract-Perm)
A2e Technologies
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Tujunga, CA, 91329
Title: FPGA Engineer Location: Northridge (Hybrid) Term: Contract-Perm (Perm Potential) Duration: Long-Term (24+ Months) Start Date: ASAP Requirements 10+ Years experience: FPGA/Modem Design Ultrascale+ & Versal Strong Design skills in VHDL & Verilog ... - Jan 06
Sr. FPGA Engineer/Contractor
A2e Technologies
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San Diego, CA
... Very collaborative with excellent communication skills and people skills Requirements FPGA Design AND Verification experience Verilog and VHDL experience preferred Vitis a Plus Experience with latest version of Xilinx and/or Altera devices such as: ... - Jan 06
Sr. FPGA Engineer (Contract-Perm)
A2e Technologies
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Los Angeles, CA, 90079
Title: FPGA Engineer Location: Northridge (Hybrid) Term: Contract-Perm (Perm Potential) Duration: Long-Term (24+ Months) Start Date: ASAP Requirements 10+ Years experience: FPGA/Modem Design Ultrascale+ & Versal Strong Design skills in VHDL & Verilog ... - Jan 06
Senior Quantum Embedded Engineer
Quantum Circuits
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New Haven, CT, 06501
... The ideal candidate will have extensive experience with Python, System Verilog for synthesis and simulation, AMD Xilinx RFSoC, mixed signal processing, and system architecture design. Candidates should have a proven track record of tackling ... - Jan 10
IC Layout Design Engineer
Auradine
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Santa Clara, CA, 95051
... * Analog Behavioral modeling in Verilog-A or Verilog-AMS Requirements: * 10+ years of analog/mixed signal IC design experience. * Deep understanding of device physics and process technology, especially as it applies to Analog/Mixed-signal designs. * ... - Jan 10
Electrical Engineer III
Acutronic Holding AG
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Rollingwood, TX, 78716
... EMI/EMC Basic understanding of common Object-Oriented Programming languages (C++, Java) Basic understanding of common HDL (VHDL/Verilog) Understanding of common data post processing tools and methods (Python, MATLAB) Prior experience working in an ... - Jan 09