ASIC Architect

Job Description

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

We are seeking a talented Computer Architect to join our architecture team and contribute to the design of next-generation AI accelerators. This role focuses on developing and optimizing compute architectures that deliver exceptional performance and efficiency for inference workloads. You will work on cutting-edge architectural problems and performance modeling with deep cross-functional collaboration to bring innovative chip designs from concept to silicon.

Key Responsibilities

Design and analyze chip architectures optimized for AI/ML workloads, with focus on throughput, latency, and power efficiency

Contribute to power and area estimation methodologies for early-stage, next generation architectural exploration

Create architectural specifications and interface definitions for compute blocks and subsystems

Collaborate with RTL, verification, physical design, and software teams to ensure architectural feasibility and ultimate optimization

Conduct architectural experiments using cycle-accurate simulators and analytical models

Support integration efforts by providing architectural guidance and resolving design challenges

You may be a good fit if you have

PhD in Computer Science, Electrical Engineering, Computer Engineering, or related field

5+ years of experience in computer architecture, ASIC design, or related fields

Strong understanding of computer architecture fundamentals including pipelines, memory hierarchies, and interconnects

Experience with performance modeling and architectural simulation tools

Hands on experience designing and optimizing floating point datapaths or arithmetic intensive circuits and working with advanced process nodes.

Proficiency in Rust, C/C++, or Python for modeling and analysis

Knowledge of modern processor microarchitecture and design tradeoffs

Strong analytical and problem-solving skills with attention to detail

Excellent communication skills and ability to work in cross-functional teams

Strong candidates may also have experience with

AI/ML accelerator architectures and dataflow optimization

RTL design and verification (Verilog/SystemVerilog)

Cycle-accurate simulation tools (gem5, SystemC, or custom simulators)

Power and performance analysis methodologies

ASIC design flow and physical design constraints

Publishing or presenting at architecture conferences (ISCA, MICRO, HPCA, etc.)

Hands-on experience with tapeout and silicon bring-up

Benefits

Medical, dental, and vision packages with generous premium coverage

$500 per month credit for waiving medical benefits

Housing subsidy of $2k per month for those living within walking distance of the office

Relocation support for those moving to San Jose (Santana Row)

Various wellness benefits covering fitness, mental health, and more

Daily lunch + dinner in our office

Unlimited compute budget subject to ROI justification

How we’re different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.

Compensation Range: $200K - $265K

Full-time