| Job alert | Jobs 21 - 30 of 455 |
GLS Verification Engineer
Tech Mahindra
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Bangalore Urban, Karnataka, India
Greetings from TechMahindra! Hiring GLS Engineer,uvm and ovm #System verilog Exp - 4+ - Apr 20
Senior Design Verification Engineer
TEKsystems
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VasanthaNagar, Karnataka, 560001, India
Job Responsibilities Extensive experience in IP/SOC Verification In-depth knowledge of System Verilog, HDL, UVM,perl,python,machine learning. worked on project-: AMBA AXI,AMBA APB,I2C,USB2.0,AES Profound knowledge of enforcing test cases, SOC ... - Apr 05
Senior ASIC/SoC RTL Engineer/Lead
ABBINENI BUSINESS MANAGEMENT Pvt. Ltd
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VasanthaNagar, Karnataka, 560001, India
Expertise in SoC/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of ... - Apr 21
Design Verification Engineer
ACL Digital
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Bengaluru, Karnataka, India
... System Verilog based UVM Functional verification, System C/C++ based functional verification. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip (NOC) ... - Apr 21
Standard Cell Char & QA Lead
ABBINENI BUSINESS MANAGEMENT Pvt. Ltd
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VasanthaNagar, Karnataka, 560001, India
... Familiarity with Simulators (HSPICE, FineSim), understanding of schematic and parasitic extraction, liberty syntax requirements, CCS, statistical characterization, Verilog models, STA and power analysis tools. Understanding of different EDA view for ... - Apr 21
Senior Design Verification Engineer
Eximietas Design
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VasanthaNagar, Karnataka, 560001, India
... Analyze and implement System Verilog assertions and coverage (code, toggle, functional). Provide mentorship and technical guidance to junior verification engineers. Manage and lead a dynamic team of verification engineers, fostering a collaborative ... - Apr 10
RTL Design Lead
Wipro
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VasanthaNagar, Karnataka, 560001, India
... Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog. In depth knowledge on RTL quality checks (Lint, CDC). Knowledge of synthesis and low power is a plus. Good understanding of AMBA bus protocols (AXI, ... - Apr 23
Senior Design verification Engineer
ARF Design Pvt Ltd
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Bangalore, Karnataka, India
₹ 300000 - ₹ 800000 per year
... for the RTL Verification Engineer position Proficiency in advanced verification methodologies like UVM/OVM/VMM/System Verilog Experience in constrained random stimulus generation, assertion-based verification, and functional coverage techniques. ... - Apr 03
Senior Design Verification Engineer
Alp Consulting Ltd.
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VasanthaNagar, Karnataka, 560001, India
... Recruiting for Verification Engineer Employment Type: Permanent Skills Required: Design Verification,Perl Programming,Verilog,Test Bench,Functional Verification,SystemVerilog,Scripting Languages Job Description for Verification Engineer Looking for ... - Apr 12
Lead CPU Verification Engineer
Tessolve
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Bengaluru, Karnataka, India
... experience in Python/Perl/TCL/Shell Strong knowledge of Verilog/System Verilog and C/C++ Strong analytical and problem-solving skills Preferred Qualifications Experience working with Multicore Processors or other complex pipelined digital products. ... - May 01