| Distance: | Job alert | Jobs 1 - 10 of 1184 |
Senior FPGA Engineer - Verilog, Digital Logic Design
Technology Navigators
–
Cedar Park, TX, 78613
140000USD - 170000USD per year
... What you get to do: -Design and develop embedded systems built on FPGA technology -Create digital logic design using Verilog / SystemVerilog -Implement high-speed DSP algorithms in digital logic -Develop custom IP cores from scratch -Work with ... - Jul 14
STA Design Engineer
Cybotic Systems
–
San Jose, CA
... Synopsys DC/DCG/FC), Verilog/System Verilog programming. · Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence). · Experience with Spyglass CDC and ... - Jun 20
Design Engineer
Millennium Software and Staffing
–
Bellevue, WA, 98009
Looking for SOC Design Verification Engineer with following skills/experiences: • UVM, System Verilog (SV) • Integrate GPU, CPU, Arm Based System • Python Scripting - Jul 15
RTL Design Engineer
Apple
–
San Diego, CA
$171,600-$302,200/year
... Deep knowledge of mixed signal concepts Deep knowledge of RTL design fundamentals Deep knowledge of Verilog and System-Verilog Deep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers) Working knowledge of ... - Jul 06
Design Verification Engineer
Millennium Software and Staffing
–
San Antonio, TX, 78208
looking for Design Verification Lead Engineer with following skills (verilog or UVM or OVM or soc or ARM) python (validation or verification) (arm or pcie or ddr or chi) - Jul 15
Lehrstelle als Elektroniker EFZ im öffentlichen Nahverkehr (m/w/d)
Modaxo
–
Neuhausen am Rheinfall, Schaffhausen, Switzerland
... Erstellung einfacher mechanischer Zeichnungen und 3D Modellierung Die Möglichkeit PLD/FPGA zu Programmieren (grafisch, AHDL, Verilog) und Simulieren Was du mitbringst: Gute schulische Leistungen mit Schwepunkt in Mathematik, Physik und Englisch ... - Jun 25
RTL Design Engineer
Apple
–
Cupertino, CA
$181,100-$318,400/year
... Deep knowledge of mixed signal concepts Deep knowledge of RTL design fundamentals Deep knowledge of Verilog and System-Verilog Deep knowledge of front-end tools (Verilog simulators, linters, clock-domain crossing checkers) Working knowledge of ... - Jul 06
Phase-Locked Loop Design Engineer (PLL) - Visa Supported
European Tech Recruit
–
North Rhine-Westphalia, Germany
... Perform schematic design, behavioral modeling, and transistor-level simulation (Spectre, HSPICE, Verilog A/AMS). Optimize for low jitter, low power, and silicon area based on project requirements. Collaborate with layout engineers to ensure layout ... - Jul 12
Emulation Verification Engineer
Apple
–
Sunnyvale, CA
$147,400-$272,100/year
... •Develop code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM. BS and 3 years relevant industry experience. Experience with System Verilog, Verilog or UVM. MS and 3+ years of industry experience with ... - Jul 06
Mixed Signal Design Engineer (DAC / ADC) - Visas Supported
European Tech Recruit
–
North Rhine-Westphalia, Germany
... - Experience in C / MATLAB / Verilog modeling. Support silicon bring-up, lab validation, and debugging of first silicon. - Document design and verification results, and support IP integration into customer products. Your Profile M.Sc. or Ph.D. in ... - Jul 12