| Distance: | Job alert | Jobs 1 - 10 of 3992 |
Analog/Mixed Signal Verilog Modeling Design Engineer
Broadcom Corporation
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Irvine, CA, 92606
... * Understand Verilog-AMS modeling language * Good knowledge of SystemVerilog UDT/UDR nettype (using Cadence wreal or EEnet package) * Familiar with analog circuits such as LDOs, TIAs, analog muxing, SARADC sample-and-hold (S/H), comparators, DAC ... - Apr 14
Staff Graphics IP Design Verification Engineer (UVM/System Verilog)
Advanced Micro Devices, Inc.
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Austin, TX, 78719
... environments * Experienced with Verilog, System Verilog, C, and C++ * Graphics pipeline knowledge * Developing UVM based verification frameworks and testbenches, processes and flows * Automating workflows in a distributed compute environment. ... - Apr 07
ASIC Design Engineer
Parade Technologies Ltd
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Beaverton, OR, 97075
Responsibilities: * Member of design team for large SOCs Qualifications: * BS/MS degree and 0-5 years of work experience * Good understanding of digital design and verification practices from course work or job experience * Ability to write Verilog ... - Apr 07
Staff ASIC Design Engineer
Parade Technologies Ltd
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Beaverton, OR, 97075
... verification practices * Ability to write RTL based on a specification and simulate vectors to verify RTL * Experience using System Verilog (SV) and at least two prior RTL designs * Extensive knowledge of PCIe, USB3, or Power Delivery Experience: * ... - Apr 07
Staff Graphics IP Design Verification Engineer (UVM/System Verilog)
Advanced Micro Devices, Inc.
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Austin, TX, 78719
... environments * Experienced with Verilog, System Verilog, C, and C++ * Graphics pipeline knowledge * Developing UVM based verification frameworks and testbenches, processes and flows * Automating workflows in a distributed compute environment. ... - Apr 03
ASIC RTL/SoC Design Engineer
TetraMem Inc
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San Jose, CA, 95131
... with emphasis on RTL/SoC/digital design Experience with Verilog and system Verilog Experience with VCS, Verdi or other industry standard tools Experience with pre-layout simulation and post-layout simulation Understanding of the design flow. ... - Apr 14
ASIC Design Engineer Intern
Ambarella
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Manhattan, NY, 10017
... Job Description Position Responsibilities: * Designing and implementing video compression logic, image processing logic, vector processing and neural network accelerator logics, and processor cores, in Verilog and System Verilog. * Logic design, ... - Apr 07
Senior FPGA Engineer - Verilog, Digital Logic Design
Technology Navigators
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Austin, TX
140000USD - 170000USD per year
... What you get to do: -Design and develop embedded systems built on FPGA technology -Create digital logic design using Verilog / SystemVerilog -Implement high-speed DSP algorithms in digital logic -Develop custom IP cores from scratch -Work with ... - Apr 14
Vision Systems Software Engineer
RIOS Intelligent Machines, Inc.
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Menlo Park, CA
... experience (OpenCV, MVETech, etc..) * Driver development experience (primarily C++) * Embedded system development (e.g., C, C++, Rust, VHDL/Verilog, etc.) * Actively practice the Git-based CI/CD workflow Please send an email to and attach a resume. ... - Apr 12
Senior Quantum Embedded Engineer
Quantum Circuits
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New Haven, CT, 06501
... The ideal candidate will have extensive experience with Python, System Verilog for synthesis and simulation, AMD Xilinx RFSoC, mixed signal processing, and system architecture design. Candidates should have a proven track record of tackling ... - Apr 07