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Distance: Job alert Jobs 11 - 20 of 1067

Design Engineer

Donatech  –  Harrisburg, PA, 17124
... • Knowledgeable in VHDL, Verilog or System Verilog RTL coding and highly proficient in DFT methodologies. • Responsible for operating in a team environment and collaborating across the different teams as required to accomplish the goals. Basic ... - Jul 17

Cellular ASIC Design Integration Engineer

Apple  –  San Diego, CA
$171,600-$302,200/year
... Strong knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.) Strong analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power improvements based on power ... - Jul 06

Emulation Verification Engineer

Apple  –  Sunnyvale, CA
$126,800-$190,900/year
... •Develop code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM. Bachelors degree. Experience with System Verilog, Verilog or UVM. MS and 3+ years of industry experience with bring-up, debugging, and ... - Jul 06

ASIC Engineer Remote )

TalentPro Consulting  –  Baltimore, MD, 21298
... Knowledgeable in VHDL, Verilog or System Verilog RTL coding and highly proficient in DFT methodologies. Responsible for operating in a team environment and collaborating across the different teams as required to accomplish the goals. Basic ... - Jul 16

REMOTE - Design Engineer 3 - ASIC #2663

Amarx Search, Inc.  –  Baltimore, MD
$75.50 - 98.00
... 8: Experience working with test engineers to implement ATPG vectors on tester hardware 9: Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting languages such as Tcl, Python or Perl 10: Effective communication and presentation skills ... - Jul 14

Cellular ASIC Design Integration Engineer

Apple  –  Sunnyvale, CA
$181,100-$318,400/year
... Strong knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.) Strong analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power improvements based on power ... - Jul 06

(Sr./Staff) ISP RTL Design Engineer

Omnivision Technologies, Inc.  –  Singapore, Central Singapore Community Development
Responsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power ... - Jul 04

Digital Hardware Engineer

Spectrumcontrol  –  Marlborough, MA
... Skills (Preferred): Experience with FPGA Design and HDL languages (Verilog/ VHDL). Experience with programming/ scripting languages (Python, C, C#). Familiarity with Defense Open Systems Architectures (SOSA, OpenVPX, VNX+). Work Environment: On-Site ... - Jul 07

Emulation Verification Engineer

Apple  –  San Diego, CA
$139,500-$258,100/year
... •Develop code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM. BS and 3 years relevant industry experience. Experience with System Verilog, Verilog or UVM. MS and 3+ years of industry experience with ... - Jul 06

FPGA Design Engineer

microTECH Global Ltd  –  Brentwood, Essex, CM13 2DP, United Kingdom
... Main Responsibilities: Design, develop, and verify FPGA modules in Verilog/SystemVerilog and VHDL Translate novel functional computing models into optimised RTL architectures Implement high:throughput, pipelined digital logic and memory interfaces ... - Jul 17
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