| Job alert | Jobs 41 - 49 of 49 |
ASIC Digital Design, Staff Engineer
Synopsys
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Sadduguntepalya, Karnataka, 560029, India
... Clock/Reset domain crossing design constraints and evaluating violations using CDC/RDC tools Enhancing and maintaining existing SERDES PHY IPs supporting multiple protocols Creating, verifying and using Core-Kit views in Core Assembler flow. ... - May 28
ASIC Digital Design, Manager
Synopsys
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Sadduguntepalya, Karnataka, 560029, India
... Hands-on experience with Synthesis, Timing Closure, DFT, Static Checks (CDC, RDC, LINT) Tools and Low Power Flows Hands-on experience in Assertion based Formal Property Verification is a definite plus. Experience in Interface protocols like USB/PCIE ... - May 23
Digital Design Engineer
Analogdevices
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Bengaluru, Karnataka, India
... as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug & Trace, TZC, SMPU, SPU) and their integration requirements Develop User Guides for RTL Integration, Synthesis, Lint/CDC waivers, DFT, PnR, Programming Sequence, characterization etc. ... - May 27
Digital Design Engineer
Analogdevices
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Bengaluru, Karnataka, India
... as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug & Trace, TZC, SMPU, SPU) and their integration requirements Develop User Guides for RTL Integration, Synthesis, Lint/CDC waivers, DFT, PnR, Programming Sequence, characterization etc. ... - May 20
Data Engineer - Data Warehousing
VY Systems Pvt Ltd.
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Bengaluru, Karnataka, India
... Change Data Capture (CDC) and Kafka Knowledge : - Experience in change data capture mechanisms and working knowledge of Kafka are valuable assets. - This indicates familiarity with real-time data processing and streaming platforms, essential for ... - May 31
Applications Engineering, Staff Engineer
Synopsys
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Sadduguntepalya, Karnataka, 560029, India
... Experience on CDC, RDC, Lint, DFT, STA, and LEC will be a plusInclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender ... - Jun 05
Staff Application Engineer Post Silicon Validation
Alphawave
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Bengaluru, Karnataka, India
... Knowledge on FPGA front-end design flow (Compilation, Synthesis, Place & route, Static timing analysis/CDC, design constraints Occasional travel may be required. You will be reporting to the Director of Application Engineer. What You'll Need: ... - May 21
Senior Engineer, Digital Design
Analogdevices
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Bengaluru, Karnataka, India
... as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug & Trace, TZC, SMPU, SPU) and their integration requirements Develop User Guides for RTL Integration, Synthesis, Lint/CDC waivers, DFT, PnR, Programming Sequence, characterization etc. ... - May 07
Senior Manager, Digital Design
Analogdevices
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Sadduguntepalya, Karnataka, 560029, India
... Experience with standard design flows including LINT,CDC, Power analysis, Low power design techniques Strong understanding of digital physical implementation challenges (synthesis, place-and-route, DFT, STA, etc.). Influence DV engineers/leaders to ... - May 07