| Job alert | Jobs 41 - 50 of 50 |
Digital Design Engineer
Analogdevices
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Bengaluru, Karnataka, India
... as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug & Trace, TZC, SMPU, SPU) and their integration requirements Develop User Guides for RTL Integration, Synthesis, Lint/CDC waivers, DFT, PnR, Programming Sequence, characterization etc. ... - May 27
Applications Engineering, Sr Engineer
Synopsys
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Sadduguntepalya, Karnataka, 560029, India
... Experience on CDC, RDC, Lint, DFT, STA, and LEC will be a plusInclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender ... - May 23
Digital Design Engineer
Analogdevices
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Bengaluru, Karnataka, India
... as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug & Trace, TZC, SMPU, SPU) and their integration requirements Develop User Guides for RTL Integration, Synthesis, Lint/CDC waivers, DFT, PnR, Programming Sequence, characterization etc. ... - May 20
Staff Application Engineer Post Silicon Validation
Alphawave
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Bengaluru, Karnataka, India
... Knowledge on FPGA front-end design flow (Compilation, Synthesis, Place & route, Static timing analysis/CDC, design constraints Occasional travel may be required. You will be reporting to the Director of Application Engineer. What You'll Need: ... - May 21
Senior Engineer, Digital Design
Analogdevices
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Bengaluru, Karnataka, India
... as caches, interconnect fabric, GIC, DMA, MMU, Coresight Debug & Trace, TZC, SMPU, SPU) and their integration requirements Develop User Guides for RTL Integration, Synthesis, Lint/CDC waivers, DFT, PnR, Programming Sequence, characterization etc. ... - May 07
Engineer, Digital Design Engineering
Analogdevices
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Sadduguntepalya, Karnataka, 560029, India
... requirements Package Digital IP for seamless integration into design flow at different stages – RTL/ constraints/ CDC waivers, timing wavers, DFT DRCs and waivers, software programming sequence etc Consolidate & curate digital IP for SPI/ ... - May 06
Senior Digital Design Engineer
Analogdevices
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Sadduguntepalya, Karnataka, 560029, India
... requirements Package Digital IP for seamless integration into design flow at different stages – RTL/ constraints/ CDC waivers, timing wavers, DFT DRCs and waivers, software programming sequence etc Consolidate & curate digital IP for SPI/ ... - May 06
Senior Engineer, Digital Design Engineering
Analogdevices
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Sadduguntepalya, Karnataka, 560029, India
... Solid understanding of digital design fundamentals, RTL coding, Lint/CDC, Low Power Checks and ASIC design flow. Excellent problem-solving skills and ability to work effectively in a team-oriented environment. Strong communication and interpersonal ... - May 06
Staff Engineer, Digital Design
Analogdevices
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Sadduguntepalya, Karnataka, 560029, India
... Solid understanding of digital design fundamentals, RTL coding, Lint/CDC, Low Power Checks and ASIC design flow. Excellent problem-solving skills and ability to work effectively in a team-oriented environment. Strong communication and interpersonal ... - May 06
Senior Manager, Digital Design
Analogdevices
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Sadduguntepalya, Karnataka, 560029, India
... Experience with standard design flows including LINT,CDC, Power analysis, Low power design techniques Strong understanding of digital physical implementation challenges (synthesis, place-and-route, DFT, STA, etc.). Influence DV engineers/leaders to ... - May 07