Post Job Free
Sign in

Staff/Senior System Validation Engineer

Company:
Achronix Semiconductor
Location:
Santa Clara, CA, 95053
Posted:
September 08, 2026
Apply

Description:

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-performance FPGA solutions. Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and embedded FPGA (eFPGA) solutions in high-volume production. Achronix's FPGA and eFPGA IP offerings are further enhanced by ready-to-use PCIe accelerator cards targeting AI, ML, networking and data center applications. All of Achronix's products are supported by best-in-class EDA software tools.

We’re hiring a Sr. Staff/Staff Systems Engineer at Achronix. If you are a systems-level thinker who loves working on cutting edge H/W Systems and PCB solutions, have expertise on PCIe/Ethernet Protocols, and love working on cutting edge hardware and firmware challenges, this is your next big move.

Job Description/Responsibilities

Design system validation testcases, including PCIE gen 5 and Ethernet106G,based on product application specifications/ customer specifications.

Run system validation tests on customer-facing cards, including DPU acceleratorcards, on different systems, and ensuring PCB robustness for differenttestcases.

Expert in PCIE Gen5 and/or Ethernet system validation.

Running Ethernet and PCIE electrical and functional compliance tests, and ableto debug issues.

Debug complex system-level issues spanning different interfaces and providerobust system solutions for them.

Driving system level specifications for the PCBs to meet system requirements.

Drive the PCB firmware specifications based on system level specifications.

Work on the PCB functional bring up.

Automating system validation flows to reduce run time and efficiently postprocess results.

Partner with cross-functional teams, including ASIC, Firmware, and Validation, toensure seamless product validation.

Required Skills

Expertise with PCIE and/or Ethernet specification protocols.

Hands-on in lab environment.

Well-versed with lab equipment such as BERT, Protocol analyzer etc.

Solid understanding of PCB architecture.

Comfortable programming in a scripting language (e.g., Python) and writingcomplete programs from scratch (e.g. 5000+ lines of code).

Comfortable designing/maintaining flows and methodologies from scratch.

Experience in high-speed memory interfaces (GDDR6/DDR5) is a plus.

Knowledge of SI/PI preferred.

Ability to break a complex problem into simpler problems and to localize andresolve problems.

Well organized, punctual, and excellent communication skills.

Education and Experience

BS/MS in electrical engineering with 8+ years of experience with at least 5+years of experience in PCIE and/or Ethernet system validation. Job Title

Staff/Senior System Validation Engineer

Requisition No

6600-1004

Type of Position

Full Time

Reports To #J-18808-Ljbffr

Apply