| Resume alert | Resumes 1 - 10 of 6912 |
Python, communication skills,c
Hyderabad, Telangana, India
... Project AUGUST 2023 – An efficient VLSI Architecture ”to remove Impulse Noise in Images”, using Decision Tree based algorithm and Edge Preserving Median Filter. Address H.NO 7-258,Laxminagar, Bhupalpally. Achievements 1st prize in chess and drawing. - May 19
... Project AUGUST 2023 – An efficient VLSI Architecture ”to remove Impulse Noise in Images”, using Decision Tree based algorithm and Edge Preserving Median Filter. Address H.NO 7-258,Laxminagar, Bhupalpally. Achievements 1st prize in chess and drawing. - May 19
Risk Management Quality Systems
Pasadena, CA
... Education: Electrical Engineering Continuing Education (Master Program) - California State University Bachelor’s degree in science – Applied Physics STAT-A-MATRIX Institute - Huntington Beach, CA VLSI/LSI Semiconductors Technology at UCLA ... - May 17
... Education: Electrical Engineering Continuing Education (Master Program) - California State University Bachelor’s degree in science – Applied Physics STAT-A-MATRIX Institute - Huntington Beach, CA VLSI/LSI Semiconductors Technology at UCLA ... - May 17
Strategic business development director
Monterey, CA
... ● Management experience - Track record of success coordinating and scheduling concurrent high visibility projects leading teams of 25–50 personnel specializing in various RTL HDL to ASIC VLSI Fab EDA & TCAD disciplines on three diverse continents. ... - May 11
... ● Management experience - Track record of success coordinating and scheduling concurrent high visibility projects leading teams of 25–50 personnel specializing in various RTL HDL to ASIC VLSI Fab EDA & TCAD disciplines on three diverse continents. ... - May 11
Quality Engineer Level Technical
Chennai, Tamil Nadu, India
... c,c++ Project description: Title: secure transfer of an image Objective: The main objective of the project is proposed to design a vlsi which is used for transfer of an image is compressed using vedic multiplier with encryption and decryption of an ... - May 06
... c,c++ Project description: Title: secure transfer of an image Objective: The main objective of the project is proposed to design a vlsi which is used for transfer of an image is compressed using vedic multiplier with encryption and decryption of an ... - May 06
Machine Learning Data Analytics
Philadelphia, PA
... Digital Integrated Circuits and VLSI; Big Data Analytics; Data & Analysis for Marketing. K. J. Somaiya College of Engineering Mumbai, India May 2022 B.Tech. in Electronics Engineering PROFESSIONAL EXPERIENCE PRECISE CENTER AT PENN ENGINEERING ... - May 02
... Digital Integrated Circuits and VLSI; Big Data Analytics; Data & Analysis for Marketing. K. J. Somaiya College of Engineering Mumbai, India May 2022 B.Tech. in Electronics Engineering PROFESSIONAL EXPERIENCE PRECISE CENTER AT PENN ENGINEERING ... - May 02
Web Developer Software Engineer
Lehi, UT
... March 2019 ●Foundational Skills Program JNTU Anantapur Andra Pradesh, India Graduated July 2016 ●Masters of Technology in VLSI Design JNTU Anantapur Andra Pradesh, India Graduated June 2014 ●Bachelor of Technology in Electronics and Communications ... - May 02
... March 2019 ●Foundational Skills Program JNTU Anantapur Andra Pradesh, India Graduated July 2016 ●Masters of Technology in VLSI Design JNTU Anantapur Andra Pradesh, India Graduated June 2014 ●Bachelor of Technology in Electronics and Communications ... - May 02
C++ Vb .Net
Palakkad, Kerala, India
... 2011-2014 SSLC STATE GVHSS Pathiripala 2011 TECHNICAL SKILLS Microprocessor 8085 Microcontroller 8051 Pic microcontroller Arm processor VLSI SOFTWARE SKILLS Familiar with C,C++, VB.net, My SQL, MATLAB, Universal VI Debugger, ISE Proteus . ... - Apr 25
... 2011-2014 SSLC STATE GVHSS Pathiripala 2011 TECHNICAL SKILLS Microprocessor 8085 Microcontroller 8051 Pic microcontroller Arm processor VLSI SOFTWARE SKILLS Familiar with C,C++, VB.net, My SQL, MATLAB, Universal VI Debugger, ISE Proteus . ... - Apr 25
Design Engineer
Reno, NV
... CAED tools: Tanner EDA L-Edit Pro, T-SPICE Pro, Mathcad, Ansoft Designer, LabView, Sonnet, Electronics Workbench, Icarus Verilog, Alliance VLSI Tools, Altium Designer, Altera Quartus II, Aldec HDL Express, IAR Embedded Workbench, IAR KickStart, ... - Apr 23
... CAED tools: Tanner EDA L-Edit Pro, T-SPICE Pro, Mathcad, Ansoft Designer, LabView, Sonnet, Electronics Workbench, Icarus Verilog, Alliance VLSI Tools, Altium Designer, Altera Quartus II, Aldec HDL Express, IAR Embedded Workbench, IAR KickStart, ... - Apr 23
Senior RF Engineer
McKinney, TX
... Introduction to Computer Networks, Communication Theory, Antenna Analysis and Design, Telecommunication Security and Protocols, Speech Processing, Digital Signal Processing, Analog VLSI Design, Introduction to Analog Integrated Circuits. ... - Apr 22
... Introduction to Computer Networks, Communication Theory, Antenna Analysis and Design, Telecommunication Security and Protocols, Speech Processing, Digital Signal Processing, Analog VLSI Design, Introduction to Analog Integrated Circuits. ... - Apr 22
ASIC Design Engineer Intern
Quan 1, 710000, Vietnam
... • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own experience and knowledge at the ... - Apr 22
... • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own experience and knowledge at the ... - Apr 22