Engineer Design
Resume:
Engr. Czharina B. Zamora
Jurong East St. 13
Singapore 600101
Phone - +65-84021186
Email – ******@*****.***
Pass No.:G6212652W
EMPLOYMENT HISTORY:
PCB Design Engineer
Astralink Technology Pte. Ltd.
26 Ayer Rajah Crescent #07-03
Singapore 139944
May 3, 2009 – present
Capture schematic drawings using Pads Power Logic software.
Component creation (Decal, CAE and Parts) for new components.
Placement and layout design using Pads Power PCB design software.
Generate project Gerber files for PCB fabrication.
Generate project BOM and relevant files for Board assembly.
Design involving RF solutions, Baseband hardware, Acoustic and Broadband VOIP telephony.
PCB Design Engineer
Promax PCB Design and Engineering
Blk3013 #02-2088/2086
Bedok Industrial Park E
Singapore 489979
November 3, 2008 – March 31, 2009
Schematic capture using Protel software.
Perform ERC check on the nets prior to Netlist Creation.
Library creation for new components.
Placement and layout design using Protel design software.
Gerber file preparation.
Gerber visual check using GC preview software.
Liaise with customer on their required specs for the board.
PCB Design Engineer
Pulax Philippines Inc.
Unit 1704, Robinsons Equitable Tower
ADB Avenue corner Poveda St.
Ortigas, Pasig City
February 14, 2007 – September 12, 2008
Parts creation, design land pattern geometries (footprints) per Pulax standards and specifications using Cadvance Alpha II design Symbol Editor.
Printed Circuit Board outline creation prior net list import on the board.
Schematic analysis prior to design, which involves checking of GND requirements, analog and digital separation.
Placement and layout design using Cadvance Alpha II design software. Board placement which involves mechanical considerations and clearance between components and to the board edge.
Board checking which involves Design Rule Check and Manufacturing Rule check using Cadvance Alpha II Batch ERC.
Preparing plot and Gerber files.
PCB Design Engineer
Rohm Electronics Philippines Inc.
Peoples Technology Complex
Export Processing Zone
Carmona, Cavite
February 13, 2003 – February 12, 2007
Schematic capture using Pads Power Logic. Requires checking of GND, analog and digital separation, power supply circuit inclusion and enough bypass capacitors for IC’s.
Negotiates with the customer about specifications of their jobs. Discuss project specifications and schedule. Assembly and debug schedule should also be considered (ICT8000, ICT2000 and ICT1800) testers.
Parts creation of new components.
Layout (Testboards, Probecards and DUT Boards) using Pads Power PCB software.
Prepares Gerber files of the PCB for fabrication use.
Perform Design Rule Check.
Checks finished boards using CAM 350.
BOM creation and maintenance.
Involved in schematic revision. Revision of schematic diagrams that is implemented by members of Test Engineering group.
OJT - Technician
Amkor Anam P3
Light and Industrial Science Park - Gate 3
Binan, Laguna
January 17 – June 7, 2000
Performs set-up for different customers under Super Ball Grid Array (SBGA) encapsulation process.
Minor repair and troubleshooting of the (ASYMTEK) encapsulation machine.
Involved in the projects and development group.
Shut down and Start up maintenance of the machine.
Monitor machine problems under the encapsulation and mold process. Keeps proper record of downtime which is caused by machine breakdown.
Formulate proposals for machines hardware development to achieve maximum machine utilization.
Sourcing out suppliers for each project proposals.
Prepares documents prior to implementation
EDUCATIONAL BACKGROUND:
Technological University of the Philippines Visayas
Bachelor of Science in Electronics and Communications Engineering
April 2002
Technological University of the Philippines Visayas
Electronics and Communications Engineering Technology
August 2000
ACHIEVEMENTS:
Licensure Examination for ECE (November 2002)
Contact this candidate