Engineer Process

Process Engineer

A hands on Engineer with good technical and people skills who enjoys collaborating with dispersed teams in both development and manufacturing environments and interacting with customers

Summary Statement

• Contributions in semiconductor, photonics, display, disk drive industry in thin film deposition of single layer alloys and multilayers (metals, dielectric) including PVD (DC, RF, and dual ion beam sputtering, e-beam evaporation), PECVD, Cu electrochemical deposition, wet etch, CMP, and plasma dielectric etch.

• Delivered solutions in process development / process control, manufacturing, and reliability.

• Developed high yield, high throughput processes required for new process / product introduction and manufacturing.

• Experience in tool ownership with contributions towards successfully reducing tool downtime / increasing uptime to enhance productivity

• Demonstrated process feasibility and process equipment reliability by working with customers (demo / JDP, wafer marathons). Participated in process and semi-equipment tool qualifications.

• Familiarity with DOE and used SPC to maintain thin film deposition process under control.

• Experience in working in fast paced start-up environment as well as large companies. Willing to travel to customer sites.

• Well organized, dedicated and self-motivated individual with excellent written and oral communication skills.

• Ph.D in Materials Science.

METROLOGY/THIN FILM CHARACTERIZATION skills include characterization of thin films for their structure, magnetic properties, electro-/ magneto-transport properties, optical properties, composition, thickness, stress, and stoichiometry.

Surfscan, Four-point Probe, X-ray Diffraction, Electron Microprobe, Scanning Electron Microscopy, Spectrophotometry, Atomic Force Microscopy, Ellipsometry, Transmission Electron Microscopy, Interferometry, Stress Measurement, Profilometry. SIMS, RBS, XPS via Charles Evans.

Professional Experience

Sr. Process Engineer / MTS – Process Engineer 2008 – 11

Opticomp Corporation / Finisar Corporation

• Involved in e-beam evaporation process and metrology for the fabrication of thin film optoelectronic devices.

• Involved in process control and failure analysis of e-beam evaporated thin films. Future involvement in process development of e-beam evaporated films as well as RIE of SiO2 and Si3N4 for fabrication of optoelectronic

devices

• Contributed in close monitoring of e-beam evaporation chamber by RGA analysis to minimize water absorption in growing thin film stack of high and low reflectance facet coating layers for fabrication of DFB lasers.

Process Development / Process Control Engineer 2005 – 08

IBM, T.J. Watson Research Center

• Delivered process solutions in CMP and Cu electroplating process technology groups for 65 nm and 45 nm device generations by working with a team of process integration engineers in different programs at IBM.

• Improved wafer yields by delivering high quality product wafers post-CMP with requisite uniformity (wafer-to-wafer and within wafer), low defectivity, and minimal dishing (over STI trenches) on small volume experimental device wafers in a semiconductor device.

• Achieved high tool productivity / uptime and reduced costs by following rigorous wafer inspection methods and meticulous CMP wafer carrier re-building procedures.

Member of Technical Staff / Sr. Process Engineer 2003 - 04

Optiva, Inc / Vitex Systems

• Contributed towards process development of a more mechanically stable, chemical, and moisture resistant thin film stack of organic and inorganic layers for LCD applications by optimizing thin film materials, and pre- and post-deposition conditions.

• Developed a monomer ramp process to alleviate particle problem in vacuum chamber resulting in increased process uptime and a 50% increased mean time between cleans.

• Improved polymer process Cp to > 1.0.

Adjunct Faculty 2002 - 02

Department of Chemical and Materials Engineering, San Jose State University

Coating Engineer / Sr. Coating Engineer 2000 - 02

JDS Uniphase

• Developed a process for reduced thin film stress (thus reducing delamination and improving yield) in SiO2 layers using Ion Tech / Veeco Spector dual ion beam sputtering system by optimizing process parameters.

• Increased product throughput by developing a high yield, high deposition rate process and transferring it to manufacturing.

• Increased yield and saved inspection time by developing a substrate and diced optical component cleaning and defect inspection process.

• Conducted reliability tests including continuous and pulse testing of single layer/bilayer dielectric material systems ZrO2/SiO2, Nb2O5/SiO2, Ta2O5/SiO2, HfO2/SiO2 to determine their suitability to withstand high laser power.

Other relevant process engineering experience: Applied Magnetics (RF Sputtering), Lam Research (Dielectric Etch / PECVD)

Education

Ph.D. Materials Science, The University of Alabama

MS Metallurgical and Materials Engineering, The University of Alabama

B.Tech Ceramic Engineering, Indian Institute of Technology (IT-BHU), Varanasi, INDIA

Publications / Presentations

14 refereed publications in journals of international circulation (J.Appl Phys, MRS Symp. Proc, J.Magn.Mag.Mat) and 3 conference presentations.

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