Systems Engineer

EHAB BARSOUM

**** ****** **, #**

Santa Clara, CA 95051

****.*******@*****.***

Mobile: 408-***-****

PROFILE

A seasoned and highly motivated engineer in Mixed Signal Automated Testing, Systems Development and Lab Evaluation of Communications and Data Conversion products.

EDUCATION

Master of Science in Electrical Engineering

Santa Clara University, Santa Clara, California, 2003

Specialization: Digital Communications and Digital Signal Processing

Bachelor of Science in Electrical Engineering

University of Central Florida, Orlando, Florida, 1997

Engineering GPA: 4.0/4.0

TECHNICAL SKILLS

Mixed Signal Automated Testing/ Lab Evaluation:

• Design and documentation of test strategy, test plan, test systems and lab setups

• Schematics design of test load boards, parts selection and bill of materials creation

• Board/ silicon debugging and characterization

• Multi-site test program development for test time reduction

• Correlation, statistical analysis, and yield studies

• Automated Test Equipment: Teradyne A5xx, Catalyst, and FLEX platforms

Hardware:

• High speed signal integrity printed circuit board (PCB) schematics design and layout review

• Digital Design, simulation and synthesis using Verilog, Debussy, and Synopsys tools

• Other CAD tools: Cadence Allegro PCB design, SPICE, ORCAD, Electronics Workbench

Software/ Systems Modeling:

• Programming Languages: C, Assembly, TCL, Visual Basic

• Digital Signal Processing real-time software development using TI TMS320C5X

• Communication/DSP Systems modeling and simulation using MATLAB and C

PROFESSIONAL EXPERIENCE

National Semiconductor, Santa Clara, CA Feb 2004 – May 2009

Staff Test Engineer, Precision Systems Division

Led the effort for the full test system development and production release of several 8-16 bits multi-channel Analog-to-Digital and Digital-to-Analog Converter families. Designed schematics for the wafer sort, and final test load boards. Selected parts, and created bill of materials. Reviewed board layout for optimum performance. Debugged boards and new silicon to validate design and evaluate new silicon. Developed characterization, wafer sort and final test programs. Designed and implemented multi-site testing for test time reduction. Generated data and plots for data sheets. Performed yield studies and analyzed results. Completed spike checks. Released complete test solution packages to production overseas. Mentored and trained junior engineers on test research and development topics.

Distinctive Achievements:

• Developed a methodology to test 16-bit Digital-to-Analog Linearity using less accurate captures

• Saved significant test time by utilizing the parallel and digital signal processing capabilities of the tester

• Developed a technique for measuring settling time for 12-bit Digital-to-Analog converter using a multi-cycle method

• Created a tool to automate the analysis of repeatability data for site to site correlation and guard band calculations

Advanced Micro Devices (AMD), Sunnyvale, CA Feb 1998 – Nov 2002

Design Engineer, Network Products Division (2000-2002)

• Developed noise cancellation and signal detection blocks for transceivers. Used Verilog and Debussy for design and verification

• Modeled and simulated several communication blocks such as baseline wander correction, slicer, equalizer, MII and GMII interfaces, using DSP Canvas

• Modeled conformance tests using Matlab

• Created test benches for efficient and thorough verification

Systems Development Engineer, Network Products Division (1998 – 2000)

• Developed and documented systems and techniques for lab testing and evaluation of a Home Networking PHY device, 10/100 Mbits/s, and 100M/1Giga bits/s LAN switches

• Took full responsibility for system validation of three revisions of a 1 Gigabit/s LAN switch IC

• Verified IC Design using Vera

• Designed and debugged evaluation boards

• Defined and wrote TCL scripts for testing switch functionality including VLANs, management frames, spanning tree, back-pressure, desktop/backbone, address handling, throughput, and latency

• Designed tests, analyzed results, identified bugs and recommended fixes and enhancements to the design team

• Performed compliance analysis tests for competitive LAN switches

• Resolved customer issues, replicated problems and provided complete software or hardware solutions, increasing customer satisfaction

RELATED PROJECTS

Reverberator: Designed and implemented a reverberator on the TMS320C50 Digital Signal Processor. Developed the software for the reverberator using Assembly language

Infra-red Transmission System: Designed and constructed a digital infra-red transmission system capable of transmitting four audio channels simultaneously, using Time Division Multiplexing

Audio Equalizer: Developed an audio amplifier and equalizer using Operational Amplifiers

PATENTS

US patent 6,816,465, "Arrangement for testing pause frame response in a network switch”

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