Nauman Iqbal

Synopsis Employed as a hardware digital design engineer for 5 years, specializing in both FPGA and Board Level design. Designing and implementing Wire-Line and Wireless Communication systems. Experienced in all phases of new product development from the conceptual stages to high volume production release of FPGA Based Designs. Proficient in designing complex FPGAs using Verilog HDL, logic & timing simulation, timing closure, directing PCB layout, hardware debug, design verification & testing and documentation for production. Creative and methodical approach to a problem solving.

Selected Strengths Languages: Verilog HDL, C, C++, JAVA, Visual C++.

Tools: Xilinx ISE, Xilinx XPS, Xilinx SDK, ModelSim, Visual Studio, Synplify, LabView Professional, Matlab, OrCAD Capture, Altium Designer, Pspice, Proteus Design Suite, Electronic Work Bench.

Strong organizational and interpersonal skills.

Effective written and verbal abilities.

Professional Experience

Employer

Dates Horizon Inc Islamabad Pakistan

Feb 2007 Onwards

Occupation held Design Engineer

Activities and responsibilities

In-depth Design capability of FPGA based systems Design cycle, Proficiently Worked with Xilinx™ Spartan3™, Spartan3AN™, Virtex4™, Virtex5™ FPGAs, Xilinx CPLDs and In-system programmable configuration PROM Based systems. In-depth capability to design with Xilinx ISE™ and Xilinx Platform Studio EDK™. Design experience on IBM PowerPC405™ Hard IP and MicroBlaze™ in Xilinx XPS™.

Interfaced DDR RAM, FLASH and SD RAMS in verilog with FPGA. Designed and Integrated Crypto modules like AES, SHA256, and TRNG.

Designed systems using Xilinx TEMAC and FIFOs, Worked with PPC405 FCM based APU controller in Xilinx XPS™ using C and Assembly.

Programmed various Ethernet ICs e.g. AX88783. Designed Ethernet Packet Processing Engine basics and Web server using TEMAC.

Designed Cypress CY7C67300 USB chips interface in verilog and C. Designed and implemented I2C, UART and USB I/O interfaces in verilog. Interfaced various LCDs using MicroBlaze and verilog,

Designed FPGA copy protection systems and time keeper ICs.

Designed with CryptoFlex Smartcards.

Interfaced Socket modems for PSTN e.g. MT5656SMI-V-92, interfaced AMBE2000™ Vocoder chip with variable data rate and FEC selection.

Working with the system architect to define module level architectures and documenting these module specifications

Converting the architecture into RTL while considering constraints such as area, speed, power and performance

Verification of the RTL at module level and top level in conjunction with the simulator group

Synthesis and formal verification

Power and performance analysis

Liaising with other teams such as simulation, drivers, research and other hardware teams

Mentoring and supervising junior engineers.

Employer

Dates Visual Soft Inc Ltd Rawalpindi

Oct 2006 to Feb 2007

Occupation held Embedded Design Engineer

Activities and responsibilities Worked among the embedded design team, the core tasks were, implementing firing tables, accessing I/O’s, processing data, designing PCB of product, platform selection for embedded OS based designs. Design was implemented with ARM7, ARM9 controllers, few Development Kits were also used for rapid design implantation, Worked on At91RM9200 DK with Arriba Linux to reduce development time.

Academic Projects

Final Year Project

Term Projects

Implementation of Digital Signal Processor on FPGA

Implementation of Analog Devices ADSP-2181, a core was developed with ADSP-2181 instruction set except Idle and Nop using Verilog HDL. Analog devices provide VDSP 3.5 for instruction set simulator. Basic Core included MAC, ALU, DAGS, Instruction decoder and Controller. Core was tested for results using an FIR filter code and compared with results using Matlab.

Stability analysis of Sigma Delta Modulators performed Matlab Simulations to analyze their stability under various initial conditions.

16-Bit RISC machine using Verilog HDL. State Machine based with effort to pipeline it.

Infra Red Transceiver using OP-505 phototransistor and Parallel Port, Buffered Infra-Red signals & forwarded per selection from PC.

Qualification

1.

Grade

Educational Institute

B.Sc Computer Engineering 2006

A

University Of Engineering and Technology Taxila Pakistan

2.

Grade

Educational Institute Higher Sec School Certificate 2002

A

Federal Govt Degree College for Men Wah Cantt Pakistan

3.

Grade

Educational Institute Secondary School Certificate 2000

A+

Govt Higher Sec School Hasan Abdal Attock Pakistan

Personal Information

Postal Address House # B – IV 1082 Eid Gah Islam Pura Hasan Abdal Attock Pakistan

Telephone(s) +92-345-*******

+92-572-******

NIC # 37103-3556675-3

E-mail(s) xkvubi@r.postjobfree.com

Nationality Pakistani

Date of birth 14th June 1984

Domicile Punjab

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