Engineer Test

TYRON ARNOLD

**** ***** ****** ***** • Garland, Texas 75040

H 972-***-**** *********@*****.*** C 469-***-****

SUMMARY

An analytical and accomplished programmer and engineering professional with experience in software and hardware development. Possesses sophisticated programming skills and a sincere passion for resolving complex embedded verification problems. Extensive development experience and strong ability to lead.

TECHNICAL SKILLS

Automatic Test Equipment: Teradyne J973, LTX Fusion HF/EX Series, Advantest 53xx and 63xx Series, ESI Laser Repair Equipment, Digital Multimeter, Logic Analyzer, Oscilloscope, Soldering Station Tool

Software and Operating Systems: C/C++ language, UNIX, X-Windows, Linux Operating system, PERL script language, Unix Shell scripts, Pascal, Fortran, Motif, HP-UX, Sun Solaris, Visual Basic, JavaScript, Assembly, HTML, Word, Excel, PowerPoint. PC motherboard knowledge

EXPERIENCE

TEXAS INSTRUMENTS, Dallas, Texas

Product Test Development Engineer 2000-Present

• Held responsibility for developing test solutions for high-speed embedded SRAM for leading-edge UltraSPARC line of microprocessors at wafer level. Created algorithms identifying/repairing 100% of memory defects, allowing prototype delivery to customer on time. Generated memory repair solutions for UltraSPARC RISC processors, with process yield very low without repairs.

• Developed software to evaluate fail address data to analyze redundancy for laser/eFuse repair.

• Provided yield/test time improvement to reduce costs through test program improvement/modifications. Created hardware design for successful testing of company’s highest-current device of 200 amps by developing hardware solution necessary to handle power requirements. Provided other business units with design model for testing future high-current devices.

• Developed embedded memory repair for technology driver products. Found embedded memory device repair issue which suppressed overall product yield. Analyzed current program and designed documentation; determined error in design document. Designed program to determine correct memory repair calculation; determined correct design information and implemented fix. Increased device yield 25%+; increased revenue by $1,000,000.

• Generated UNIX scripting and PERL scripts to monitor yield and analyze test data results on LTX Fusion tester.

• Designed hardware for prototype/production testing; ordered probe card to achieve test plan. Provided bitmap failure analysis information to design team, driving other device improvements with information provided.

• Provided support for Device Ramp to production; interfaced with transfer teams to bring up device test programs to other production sites. Developed electrical fuse blow experiment to determine the optimal blow conditions for a specific device technology. Results indicated specific programming power supply pulse width and supply voltage to achieve optimal conditions for current technology used by other devices.

• Conducted first silicon debug on embedded memory to improve yield and identify root cause problem.

• Communicated/coordinated with memory design group for necessary information to verify circuit parameters, functionality, and improvement for memory device in DFT operation/redundancy circuit.

STAKTEK, Austin, Texas

Product Test/Verification Engineer 1998-2000

• Developed test, characterization programs, specifications, procedures for DDR/SDRAM/EDO DRAM stacked memory modules.

• Direct responsibility for device failure analysis, test programs, test process improvement, and test systems, equipment troubleshooting.

• Discovered memory tester failing devices intermittently. Performed signal timing analysis and found signal edges’ start times were incorrect; manually calibrated system to get optimal performance and eliminated test fail intermittency.

• Designed production menu system for ease of selection/operation to improve production test program access; increased throughput by elimination of retest requirement.

ADDITIONAL EXPERIENCE

MOTOROLA SEMICONDUCTOR, Austin, Texas, Test Engineer II, 1997-1998. Developed/debugged test software for logic devices. Transferred test programs across different system platforms, increasing capacity; troubleshot test systems/equipment. Assisted device/product engineers in test-related issues for logic devices. Encountered multiple issues on some devices showing different fail rates on specific testers; analyzed tests showing increased fail rate; adjusted programs to eliminate intermittency. Increased product yield/throughput for multiple devices by increasing number of testers utilized for some products.

HITACHI SEMICONDUCTOR (AMERICA), INC., Irving, Texas, Test Engineer I, 1992-1997. Responsible for developing and implementing methods of testing/troubleshooting system and equipment. Prepared test/diagnostic programs, test fixtures, probe cards, and equipment specifications/procedures for SRAM/DRAM/EDO. Assisted product engineers using Shmoo/FBM analysis. Responsible for test department documentation. Created/updated all test specifications. Managed all laser repair activities, including die ID programming and die repairing for yield improvement. Set up Advantest T5335P tester using TEL/KLA P-8 probers using GPIB interface/SUN host operating system; set up MDA (multiple die alignment) laser repair for memory devices. Promoted to Test Engineer in 1994.

EDUCATION

DEVRY INSTITUTE OF TECHNOLOGY, Irving, Texas, B.S., Electronic Engineering Technology, 1990

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