Project Design

OBJECTIVE:

To obtain a position where I can utilize and simultaneously develop my analytical, programming and technical skills

EDUCATION:

Master of Science in VLSI, Manipal University.

Graduation Date: June 2012 GPA 8.21/10.0

Bachelor of Technology in Electrical & Electronics Engineering, JNTU.

Graduation Date: May 2009 Percentage 64.71

Intermediate (M.P.C), Narayana junior College.

Pass out Date: April 2005 Percentage 71.9

SSC, Xavier Memorial High School.

Pass out Date: April 2003 Percentage 77.5

SKILL SET:

Programming Languages Verilog, System C, System Verilog, C, Shell Scripting

Functional Simulation Synopsys VCS, Modelsim, Visual Studio, Altera Quartus II

Synthesis Synopsys Design Compiler, Cadence RTL Compiler

Physical Design Cadence Encounter

CMOS Design Spice, Magic

Operating Systems Windows XP/VISTA/7, Linux

EXPERIENCE:

Organization: Arasan Chip Systems Inc. (June 2012-Till Date)

Designation: Project Trainee

Project: Verification of UFS Device Protocol

Technologies used:

• SystemVerilog

Description:

System Level Verification of UFS Device Protocol using the UVM architecture. Universal Flash Storage is a simple, high performance mass storage device generally used for processing between host and storage devices.

Roles and Responsibilities:

• Wrote random test cases to check the functionality.

• Wrote functional coverage, register coverage and implementing covergroups.

• Wrote the directed test cases for the corner cases.

Organization: Arasan Chip Systems Inc. (August 2011-June 2012)

Designation: Intern

Project: Electronic System Level Design of SOC Components

Technologies used:

• SystemC

Description:

Electronic System Level is a design methodology that focuses on the higher level of abstraction, offers a way to have a fast executable specification of the design that can be used to validate the system concepts. The components that were designed in this SOC are CORE TIMER at TLM, SPI, I2C bus protocol.

Roles and Responsibilities:

• Developed the IP’s at higher level of abstraction than RTL

• Wrote Test Cases to verify the different scenarios of the design

• Wrote the Design documentation and the Test cases Documentation

• Developed the parser file logic that simplifies the testing of the design

ACADEMIC PROJECTS:

Title: Verification of Arbiter (Mar 2011-June 2011)

Technologies used:

• System Verilog, VCS

Description:

The functionalities of different arbiter schemes are verified in this project. We have verified the Round Robin Arbiter, Fixed Priority Arbiter and Weighted Round Robin Arbiter schemes. A variable is used for the selection of the scheme and the requests are randomly given and verified the grants are asserted according to the functionality of the selected arbiter.

Responsibilities:

• Developed the Test Environment Components – Driver, Interface and Scoreboard

• Wrote the test cases for Round Robin Arbiter

• Executed functional test cases

• Documented the entire project

Title: Design of Synchronous FIFO Interface with CPU (Sep 2010-Jan 2010)

Technologies used:

• Verilog, VCS, Design Compiler

Description:

Design consists of a register block that performs write and read operations for setting water mark levels, hysteresis levels and to read the value of status register. The read operation is also used to fetch the data in the registers which already has been stored.

Responsibilities:

• Gathered and analyzed requirements

• Designed Block and Timing diagrams

• Wrote the code for the design

• Documented the project

Title: The Smart AC Power Meter (Jan 2008-April 2009)

Technologies used:

• C

Description:

The objective of the project is to acquire the data that is necessary to calculate the quantities such as real power, apparent power, power factor, rms voltage, rms current, frequency and energy that is being consumed for a particular apparatus, with the usage of sensors voltage and current values are taken and above mentioned are found by calculating. This is dumped in to the microcontroller ATMEGA32 and result is monitored on LCD screen.

Responsibilities:

• Developed and tested the hardware design of the project

• Involved in the coding

• Documented the project

Title: Study of Speed Control of DC motor using Drives (April 2008 – May 2008)

Technologies used:

• MATLAB

Description:

This project was done as industrial oriented mini project in which the speed characteristics and the speed control methods of different motors are studied and using these concepts two effective way of the speed control had been designed using diodes and thyristors.

Responsibilities:

• Studied the working of different DC motors

• Analyzed the different speeds that can be controlled by the thyristors

• Designed a sample circuit that works as a prototype for the project

Achievements

• Participated in National Level Symposium, Refulgence ’08 at Muffakham Jah College of Engineering & Technology, Hyderabad.

• Participated in National Level Symposium, Illuminati ’08 at St. Mary’s College of Engineering & Technology, Hyderabad.

• Winner of bronze medal in long jump at sports meet, Felicity ’11 at Manipal University.

• Member of kabaddi team, which won first prize in intra college competition at graduation.

• Member of cricket team, runner in intra college competition at graduation.

• Served as National Green Corps at school level.

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