Design Electrical Engineering

DHARMIK V. SONI

***, *****, *** ******, *** #**, San Jose, CA 95112

551-***-**** E mail: *****@****.***

OBJECTIVE Seeking fulltime position in the field of ASIC/FPGA design and verification.

EDUCATION

SKILLS M.S. Electrical Engineering, New Jersey Institute of Technology, NJ GPA : 3.5 May 2011

B.E. Electronics and Communication, Gujarat University, India GPA : 3.9 July 2009

Relevant Course Work:

ASIC CMOS Design and Verification Digital System and logic Design

Digital system design and Synthesis Advanced Microprocessor Architecture

VLSI Design Advanced Computer Architecture

Hardware: Digital and Analog CMOS design and synthesis, RTL coding and Verification, Layout verification, Static Timing Analysis[STA]

Programming: Proficient in C, Verilog HDL/VHDL, ASIC/FPGA design, Perl Scripting,

Assembly programming, Embedded C.

Tools: CAD layout tools, Mentor Graphics Design Tools, H Spice, Synopsys,

Modelsim, VCS, Cadence Design Tools.

Equipment: Digital Oscilloscope, Function Generator, Digital Voltmeter, Power Supply, Logic

Analyzer, FPGA development board.

ACADEMIC PROJECTS

Design of Packet Classifier using HICUTS algorithm (NJIT Spring'11)

- Performed RTL design and synthesis using VHDL to design a packet classifier based on hierarchical intelligent cuttings algorithm.

- Using HICUT methodology, designed an ASIC to classify packets.

- Developing Tool: Modelsim web edition, Mentorgraphics tools.

Design a simple 16 bit microprocessor (NJIT Spring '11)

- The purpose of this project is to design, analyze and optimize a very simple 16 bit processor using VERILOG.

- The fundamental operations of the processor is to fetch, decode and execute the instructions and updating memory, program counter and register if needed.

- Developing Tool: Modelsim web edition, Mentorgraphics, Velocity for STA.

Design a 8-bit synchronous shift register (NJIT Fall '10)

- Designed a circuit schematic and layout using Mentorgraphics design tool in 35nm Technology.

- Performed DRC and LVS check of the design. Performed post layout simulation using HSPICE.

- Developing Tool: Mentorgraphics.

8 Bit Rate Multiplier(Static) (NJIT Spring’10)

- Designed a circuit schematic and layout using Mentorgraphics tool.

- Performed a transistor level design and analysis to meet certain power and speed specifications. Designed in 0.35 µm technology.

- Developing Tool: Mentorgraphics.

Design of Planetary Space Probe (NJIT Spring '10)

- Designed the circuit schematic of planetary space probe.

- Performed interfacing DSP and other space parameter measuring components with microprocessor.

EXPERIENCE Institute For Plasma Research, Gujarat, INDIA (Jan’09 to June’09)

B.E.E.C. Engineering Intern :

8 Channel temperature monitoring system for Cryogenic temperature sensors:

- Designed a circuit using ATMEL 89S51 to sense temperature from 8 different temperature sensors inserted in liquid nitrogen.

- RS-232 was used to communicate with computer, ADC to convert the analog data into digital & interfaced the LCD for user convenience.

- Designed GUI using Labview to store measured data into Excel sheet.

- Developing Tool: Embedded ‘C’, KEIL IDE, Labview.

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